> -----Original Message-----
> From: Michael Kelley (EOSG)
> Sent: Thursday, April 26, 2018 3:55 PM
> To: KY Srinivasan <k...@microsoft.com>; x...@kernel.org;
> gre...@linuxfoundation.org; linux-ker...@vger.kernel.org;
> de...@linuxdriverproject.org; o...@aepfle.de; a...@canonical.com;
> jasow...@redhat.com; t...@linutronix.de; h...@zytor.com; Stephen
> Hemminger <sthem...@microsoft.com>; vkuzn...@redhat.com
> Subject: RE: [PATCH 2/5] X86: Hyper-V: Enable IPI enlightenments
>
> > -----Original Message-----
> > From: k...@linuxonhyperv.com <k...@linuxonhyperv.com>
> > Sent: Wednesday, April 25, 2018 11:13 AM
> > To: x...@kernel.org; gre...@linuxfoundation.org; linux-
> ker...@vger.kernel.org;
> > de...@linuxdriverproject.org; o...@aepfle.de; a...@canonical.com;
> jasow...@redhat.com;
> > t...@linutronix.de; h...@zytor.com; Stephen Hemminger
> <sthem...@microsoft.com>;
> > Michael Kelley (EOSG) <michael.h.kel...@microsoft.com>;
> vkuzn...@redhat.com
> > Cc: KY Srinivasan <k...@microsoft.com>
> > Subject: [PATCH 2/5] X86: Hyper-V: Enable IPI enlightenments
> >
> > From: "K. Y. Srinivasan" <k...@microsoft.com>
> >
> > Hyper-V supports hypercalls to implement IPI; use them.
> >
> > Signed-off-by: K. Y. Srinivasan <k...@microsoft.com>
> > ---
> > arch/x86/hyperv/hv_apic.c | 125
> +++++++++++++++++++++++++++++++++++++
> > arch/x86/hyperv/hv_init.c | 17 +++++
> > arch/x86/include/asm/hyperv-tlfs.h | 9 +++
> > arch/x86/include/asm/mshyperv.h | 1 +
> > 4 files changed, 152 insertions(+)
> >
> > diff --git a/arch/x86/hyperv/hv_apic.c b/arch/x86/hyperv/hv_apic.c
> > index e0a5b36208fc..7f3322ecfb01 100644
> > --- a/arch/x86/hyperv/hv_apic.c
> > +++ b/arch/x86/hyperv/hv_apic.c
> > @@ -30,6 +30,14 @@
> > #include <linux/slab.h>
> > #include <linux/cpuhotplug.h>
> >
> > +struct ipi_arg_non_ex {
> > + u32 vector;
> > + u32 reserved;
> > + u64 cpu_mask;
> > +};
>
> I think we'd like to put structures like this, which are defined in the
> Hyper-V Top Level Functional Spec, in hyperv-tlfs.h. Also, the 5.0b
> version of the TLFS, which is latest, shows this structure on page 100:
>
> u32 vector;
> u8 targetvtl;
> u8 reserved[3];
> u64 cpu_mask;
>
Good point. I will make the necessary adjustments.
Regards,
K. Y
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