Fix a lot of checkpath errors of the type:
        -CHECK: spaces preferred around that
        -CHECK: Alignment should match open parenthesis

Signed-off-by: Jose Carlos Cazarin Filho <joseespir...@gmail.com>
---
 My second commit to the kernel, I know you ppl don't like these kind of commits
 fixing style-only erros pointed by the checkpath, but I'm doing this just to 
learn
 Thanks!
 drivers/staging/rtl8188eu/hal/phy.c | 54 ++++++++++++++---------------
 1 file changed, 27 insertions(+), 27 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/phy.c 
b/drivers/staging/rtl8188eu/hal/phy.c
index 51c40abfa..f0d242dec 100644
--- a/drivers/staging/rtl8188eu/hal/phy.c
+++ b/drivers/staging/rtl8188eu/hal/phy.c
@@ -52,7 +52,7 @@ void phy_set_bb_reg(struct adapter *adapt, u32 regaddr, u32 
bitmask, u32 data)
 }
 
 static u32 rf_serial_read(struct adapter *adapt,
-                       enum rf_radio_path rfpath, u32 offset)
+                         enum rf_radio_path rfpath, u32 offset)
 {
        u32 ret = 0;
        struct bb_reg_def *phyreg = &adapt->HalData->PHYRegDef[rfpath];
@@ -69,10 +69,10 @@ static u32 rf_serial_read(struct adapter *adapt,
                                            bMaskDWord);
 
        tmplong2 = (tmplong2 & (~bLSSIReadAddress)) |
-                  (offset<<23) | bLSSIReadEdge;
+                  (offset << 23) | bLSSIReadEdge;
 
        phy_set_bb_reg(adapt, rFPGA0_XA_HSSIParameter2, bMaskDWord,
-                      tmplong&(~bLSSIReadEdge));
+                      tmplong & (~bLSSIReadEdge));
        udelay(10);
 
        phy_set_bb_reg(adapt, phyreg->rfHSSIPara2, bMaskDWord, tmplong2);
@@ -102,12 +102,12 @@ static void rf_serial_write(struct adapter *adapt,
        struct bb_reg_def *phyreg = &adapt->HalData->PHYRegDef[rfpath];
 
        offset &= 0xff;
-       data_and_addr = ((offset<<20) | (data&0x000fffff)) & 0x0fffffff;
+       data_and_addr = ((offset << 20) | (data & 0x000fffff)) & 0x0fffffff;
        phy_set_bb_reg(adapt, phyreg->rf3wireOffset, bMaskDWord, data_and_addr);
 }
 
 u32 rtw_hal_read_rfreg(struct adapter *adapt, enum rf_radio_path rf_path,
-                    u32 reg_addr, u32 bit_mask)
+                      u32 reg_addr, u32 bit_mask)
 {
        u32 original_value, bit_shift;
 
@@ -117,7 +117,7 @@ u32 rtw_hal_read_rfreg(struct adapter *adapt, enum 
rf_radio_path rf_path,
 }
 
 void phy_set_rf_reg(struct adapter *adapt, enum rf_radio_path rf_path,
-                    u32 reg_addr, u32 bit_mask, u32 data)
+                   u32 reg_addr, u32 bit_mask, u32 data)
 {
        u32 original_value, bit_shift;
 
@@ -143,20 +143,20 @@ static void get_tx_power_index(struct adapter *adapt, u8 
channel, u8 *cck_pwr,
        for (TxCount = 0; TxCount < path_nums; TxCount++) {
                if (TxCount == RF_PATH_A) {
                        cck_pwr[TxCount] = 
hal_data->Index24G_CCK_Base[TxCount][index];
-                       ofdm_pwr[TxCount] = 
hal_data->Index24G_BW40_Base[RF_PATH_A][index]+
+                       ofdm_pwr[TxCount] = 
hal_data->Index24G_BW40_Base[RF_PATH_A][index] +
                                            
hal_data->OFDM_24G_Diff[TxCount][RF_PATH_A];
 
-                       bw20_pwr[TxCount] = 
hal_data->Index24G_BW40_Base[RF_PATH_A][index]+
+                       bw20_pwr[TxCount] = 
hal_data->Index24G_BW40_Base[RF_PATH_A][index] +
                                            
hal_data->BW20_24G_Diff[TxCount][RF_PATH_A];
                        bw40_pwr[TxCount] = 
hal_data->Index24G_BW40_Base[TxCount][index];
                } else if (TxCount == RF_PATH_B) {
                        cck_pwr[TxCount] = 
hal_data->Index24G_CCK_Base[TxCount][index];
-                       ofdm_pwr[TxCount] = 
hal_data->Index24G_BW40_Base[RF_PATH_A][index]+
-                       hal_data->BW20_24G_Diff[RF_PATH_A][index]+
+                       ofdm_pwr[TxCount] = 
hal_data->Index24G_BW40_Base[RF_PATH_A][index] +
+                       hal_data->BW20_24G_Diff[RF_PATH_A][index] +
                        hal_data->BW20_24G_Diff[TxCount][index];
 
-                       bw20_pwr[TxCount] = 
hal_data->Index24G_BW40_Base[RF_PATH_A][index]+
-                       hal_data->BW20_24G_Diff[TxCount][RF_PATH_A]+
+                       bw20_pwr[TxCount] = 
hal_data->Index24G_BW40_Base[RF_PATH_A][index] +
+                       hal_data->BW20_24G_Diff[TxCount][RF_PATH_A] +
                        hal_data->BW20_24G_Diff[TxCount][index];
                        bw40_pwr[TxCount] = 
hal_data->Index24G_BW40_Base[TxCount][index];
                }
@@ -190,7 +190,7 @@ void phy_set_tx_power_level(struct adapter *adapt, u8 
channel)
 
        rtl88eu_phy_rf6052_set_cck_txpower(adapt, &cck_pwr[0]);
        rtl88eu_phy_rf6052_set_ofdm_txpower(adapt, &ofdm_pwr[0], &bw20_pwr[0],
-                                         &bw40_pwr[0], channel);
+                                           &bw40_pwr[0], channel);
 }
 
 static void phy_set_bw_mode_callback(struct adapter *adapt)
@@ -903,13 +903,13 @@ static bool simularity_compare(struct adapter *adapt, s32 
resulta[][8],
                if (diff > MAX_TOLERANCE) {
                        if ((i == 2 || i == 6) && !sim_bitmap) {
                                if (resulta[c1][i] + resulta[c1][i+1] == 0)
-                                       final_candidate[(i/4)] = c2;
+                                       final_candidate[(i / 4)] = c2;
                                else if (resulta[c2][i] + resulta[c2][i+1] == 0)
-                                       final_candidate[(i/4)] = c1;
+                                       final_candidate[(i / 4)] = c1;
                                else
-                                       sim_bitmap = sim_bitmap | (1<<i);
+                                       sim_bitmap = sim_bitmap | (1 << i);
                        } else {
-                               sim_bitmap = sim_bitmap | (1<<i);
+                               sim_bitmap = sim_bitmap | (1 << i);
                        }
                }
        }
@@ -1074,19 +1074,19 @@ static void phy_iq_calibrate(struct adapter *adapt, s32 
result[][8],
                        path_b_ok = phy_path_b_iqk(adapt);
                        if (path_b_ok == 0x03) {
                                result[t][4] = (phy_query_bb_reg(adapt, 
rTx_Power_Before_IQK_B,
-                                                                
bMaskDWord)&0x3FF0000)>>16;
+                                                                
bMaskDWord)&0x3FF0000) >> 16;
                                result[t][5] = (phy_query_bb_reg(adapt, 
rTx_Power_After_IQK_B,
-                                                                
bMaskDWord)&0x3FF0000)>>16;
+                                                                
bMaskDWord)&0x3FF0000) >> 16;
                                result[t][6] = (phy_query_bb_reg(adapt, 
rRx_Power_Before_IQK_B_2,
-                                                                
bMaskDWord)&0x3FF0000)>>16;
+                                                                
bMaskDWord)&0x3FF0000) >> 16;
                                result[t][7] = (phy_query_bb_reg(adapt, 
rRx_Power_After_IQK_B_2,
-                                                                
bMaskDWord)&0x3FF0000)>>16;
+                                                                
bMaskDWord)&0x3FF0000) >> 16;
                                break;
                        } else if (i == (retry_count - 1) && path_b_ok == 0x01) 
{       /* Tx IQK OK */
                                result[t][4] = (phy_query_bb_reg(adapt, 
rTx_Power_Before_IQK_B,
-                                                                
bMaskDWord)&0x3FF0000)>>16;
+                                                                
bMaskDWord)&0x3FF0000) >> 16;
                                result[t][5] = (phy_query_bb_reg(adapt, 
rTx_Power_After_IQK_B,
-                                                                
bMaskDWord)&0x3FF0000)>>16;
+                                                                
bMaskDWord)&0x3FF0000) >> 16;
                        }
                }
 
@@ -1158,12 +1158,12 @@ static void phy_lc_calibrate(struct adapter *adapt, 
bool is2t)
                /* 2. Set RF mode = standby mode */
                /* Path-A */
                phy_set_rf_reg(adapt, RF_PATH_A, RF_AC, bMask12Bits,
-                              (rf_a_mode&0x8FFFF)|0x10000);
+                              (rf_a_mode&0x8FFFF) | 0x10000);
 
                /* Path-B */
                if (is2t)
                        phy_set_rf_reg(adapt, RF_PATH_B, RF_AC, bMask12Bits,
-                                      (rf_b_mode&0x8FFFF)|0x10000);
+                                      (rf_b_mode&0x8FFFF) | 0x10000);
        }
 
        /* 3. Read RF reg18 */
@@ -1171,12 +1171,12 @@ static void phy_lc_calibrate(struct adapter *adapt, 
bool is2t)
 
        /* 4. Set LC calibration begin bit15 */
        phy_set_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits,
-                      lc_cal|0x08000);
+                      lc_cal | 0x08000);
 
        msleep(100);
 
        /* Restore original situation */
-       if ((tmpreg&0x70) != 0) {
+       if ((tmpreg & 0x70) != 0) {
                /* Deal with continuous TX case */
                /* Path-A */
                usb_write8(adapt, 0xd03, tmpreg);
-- 
2.20.1

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