Hello, Alex,
Sorry, it's me, again ;-)
Can I control the assignment of PCIe lanes at the linux level?
After understanding the PCIe tree, I'm back where I started.
I now _understand_ what happened, but still want to be able to _change_ that.
Compare my previous / after settings:
before after
Slot 1 Tesla Tesla
lanes x16 x16
Slot 2 quad NIC quad NIC
lanes x4 x4
Slot 3 Quadro2000 quad NIC
lanes x16 x4
Slot 4 quad NIC Quadro2000
x1 x8
x1-slot: empty empty
To summarize asssignement of PCIe lanes:
before: 16 4 16 1 0 total = 37
after: 16 4 4 8 0 total = 32
So, in the "before" setup, there was neither a lack of slot 4 capability to
deliver x4 (it can deliver x8 afterwards).
Nor there was a lack of total pcie lanes, if I only had been able to contain
the greed of the Quadro video card in Slot 3.
I googled across somebody saying that the kernel tries to follow bios
recommendations, but not blindly (sorry, can' find that again). From that I
conclude that those assignments are not written in stone after bootup, are
they?
When I read the man pages of pcilib & setpci, I seet that in principle I could
poke into the registers of pci devices.
And there are lots of interesting things below /sys/devices/pci0000:00
attracting my naive curiousity.
So I see the reengineering way of reinventing the wheel, work through all the
data sheets and after some months of hard work and some bricked pieces of
hardware, I may end up with a solution.
But I woulnd't mind if somebody had done this already ;-)
Is there a document, a tool, a config file, a /proc/bus/where/ever or such
where I can control the assignment of PCIe lanes to the slots at some higher
level?
Wolfgang Rosner
------------------------------------------------------------------------------
Dive into the World of Parallel Programming The Go Parallel Website, sponsored
by Intel and developed in partnership with Slashdot Media, is your hub for all
things parallel software development, from weekly thought leadership blogs to
news, videos, case studies, tutorials and more. Take a look and join the
conversation now. http://goparallel.sourceforge.net/
_______________________________________________
E1000-devel mailing list
[email protected]
https://lists.sourceforge.net/lists/listinfo/e1000-devel
To learn more about Intel® Ethernet, visit
http://communities.intel.com/community/wired
