kalyani <[EMAIL PROTECTED]> writes: > Hi, thanks for the reply. Actually i am new to this concept, i have gone > through the links which you have sent. How to write our own exception > handlers into VSR is what i want to know. I want to implement this at > Application level. Kernel exception is the default configuration as i > understood from the document. It is given that VSRshould be written in > assembly language for Application exception handler. Can you please clarify > all my doubts and please can you provide me any example codes for this > exception handlers if any which have already been implemented.
VSRs are entered after minimal processing and with the state as close to the CPU exception entry state as possible. If there has been any decoding of the exception source then some registers may have been saved somewhere architecture specific and will now contain some other data -- usually some representation of the exception number or VSR table index. Plugging the VSRs is not done very often, and there are no examples. You don't say what architecture you are working on, so any example may not be appropriate. Mainly you need to know about how the CPU delivers exceptions. The best thing to do is to look at how the default exception VSR handler works in vectors.S and duplicate it as far as is necessary for your purposes. -- Nick Garnett eCos Kernel Architect http://www.ecoscentric.com The eCos and RedBoot experts
