Øyvind Harboe wrote:
On 11/7/06, Andrew Lunn <[EMAIL PROTECTED]> wrote:
Hi Folks
I think it is unlikley this is your problem, but i will mention it
anyway. I once had an assertion failure in the same place. It was
caused by a thread exiting with the scheduler locked.
Another thing to check is do you have an spurious interrupts. There
has been problems on the ARM platform not correctly dealing with
this. Since spurious interrupts generally means broken hardware, its
not the easiest thing to test and debug.
I have the option set: CYGIMP_HAL_COMMON_INTERRUPTS_IGNORE_SPURIOUS.
Is this not a solution for this?
After fixing a bug in our DDR controller(implemented in FPGA), we can
no longer reproduce the problem..... Crossing fingers.... :-)
It is hard enough to tell how a system behaves when it works, but to
explain what possible a *nearly* working DDR controller could result
in, is pretty much impossible.
The main symptom of our broken DDR controller was that the whole
system locked up. We'll run some more overnight testing, but it looks
like the "Scheduler lock not zero" assert failure was just another,
albeit unfatohmable, manifestation of that same problem.
--
Jürgen Lambrecht
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