Andrew Lunn schrieb:
I would think that Thumb2 processors like the M3 would need to
be a different architecture than ARM. It's a different
instruction set -- isn't that what defines an architecture?
With ARM it is all a bit messy. eg some of the processors support
thumb2 as an add on, just like the support thumb. For such processors,
you could add thumb2 support to the existing ARM architecture, with
the understanding that all interrupt handling is done in the good old
ARM instruction set. However user code could be in thumb/thumb2.
For the Cortex M processors you cannot do this, so a new architecture
is needed when you _only_ have thumb/thumb2.
So, I guess we should introduce a new architecture named "armv7m". I
think this makes sense as we can then support both M3 and M1 as
variants. What do you think?
--
Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos
and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss
