Hi Elad Christophe Coutand wrote:
> The CDL for your variant/platform must implement the profiling timer, > for example check > \hal\cortexm\stm32\var\current\cdl\hal_cortexm_stm32.cdl (from anoncvs) > > implements CYGINT_PROFILE_HAL_TIMER > > The STM32 variant implements the timer in > hal\cortexm\stm32\var\current\src\stm32_misc.c. You basically need to > fill the init function ( hal_enable_profile_timer(int resolution) ) that > starts the timer and then from the timer ISR, call __profile_hit(). To ensure access to the saved interrupt state (including the program counter value) from your profiling timer ISR, you will also need to modify the condition used to set hal_saved_interrupt_state in the MIPS architectural HAL. In hal/mips/arch/current/src/vectors.S, replace: > #if defined(CYGDBG_HAL_MIPS_DEBUG_GDB_CTRLC_SUPPORT) > # If we are supporting Ctrl-C interrupts from GDB, we must squirrel > # away a pointer to the save interrupt state here so that we can > # plant a breakpoint at some later time. > > .extern hal_saved_interrupt_state > la v0,hal_saved_interrupt_state > sw s0,0(v0) > > #endif With: > #if CYGINT_HAL_COMMON_SAVED_INTERRUPT_STATE_REQUIRED > 0 > # If we are supporting Ctrl-C interrupts from GDB, we must squirrel > # away a pointer to the save interrupt state here so that we can > # plant a breakpoint at some later time. > > .extern hal_saved_interrupt_state > la v0,hal_saved_interrupt_state > sw s0,0(v0) > > #endif This is assuming that you are working with eCos source code from current CVS. I hope this helps... John Dallaway eCos maintainer http://www.dallaway.org.uk/john -- Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss
