The dump file shows address boundaries are even for my three suspect functions, the remaining functions appear on even boundaries too. But I do suspect my memory map. I don't have a good template to start from so after many experiments I'm using a map with no confidence. I'll do some checking and report back here, thank you for the tip Kurt.

Les


On 07/29/2014 11:35 PM, Kurt Siedenburg wrote:
I once had a similar problem which turned out to be unaligned instructions.
Source was an assembly file with embedded strings which didn't contain proper 
alignment directives.
Thus a modified string now contained an odd number of characters.  And the 
instructions after that string all became unaligned.

Please note that I never dealt with Sparc - only with ARM and MIPS and some 
x86.  So I don't know if the above applies in your case.

If you want to follow up on this you can look at your map file.
Check if the addresses for _timer_poll, do_idle, and net_io_test happens to be 
odd (with DEBUG disabled).
Possibly with DEBUG enabled the addresses could be aligned again.

Good luck,
   Kurt

-----Original Message-----
From: [email protected] 
[mailto:[email protected]] On Behalf Of Les Miklosy
Sent: Tuesday, July 29, 2014 10:19 PM
To: [email protected]
Subject: [ECOS] RedBoot hits fetch instruction trap

During execution of RedBoot configured for a  Sparc Leon3 IP core the process 
hits a trap on instruction fetch in the RedBoot routine _timer_poll(). The 
debugger history and assembly are attached. The process will execute RedBoot 
commands at the command prompt and otherwise behave normally until a branch 
instruction to do_idle and subsequently net_io_test(), that is where execution 
eventually fails.

Oddly the process runs without fault when DEBUG command options are selected 
during configuration of the build with configtool, trouble begins when the 
DEBUG options are again removed. The DEBUG instructions appear in the ethernet 
modules and in RedBoot's net_io. If this is a timing issue can someone please 
suggest what parameters can be tweeked to resolve the traps, or if a memory 
alignment problem can someone offer a memory map and alignment parameters? Are 
there configuration selections in the amba bus header file, those might be 
helpful too.

The compiler is sparc-elf-gcc-3.4.4  I'm using two additional compilation flags 
 -msoft-float and D-ECOS. The system configuration is also attached to this 
email.  Thank you for directions. -Les



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