Revision: 14810
http://sourceforge.net/p/edk2/code/14810
Author: oliviermartin
Date: 2013-10-29 06:36:34 +0000 (Tue, 29 Oct 2013)
Log Message:
-----------
ARM Packages: Renamed PL390Gic driver into ArmGic driver
The aim is to make this driver follows the ARM GIC specifications and
be implementation independent.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <[email protected]>
Modified Paths:
--------------
trunk/edk2/ArmPkg/ArmPkg.dec
trunk/edk2/ArmPkg/ArmPkg.dsc
trunk/edk2/ArmPkg/Include/Library/ArmGicLib.h
trunk/edk2/ArmPlatformPkg/ArmPlatformPkg-2ndstage.dsc
trunk/edk2/ArmPlatformPkg/ArmPlatformPkg.dsc
trunk/edk2/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A8.dsc
trunk/edk2/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A9x2.dsc
trunk/edk2/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-MPCore.fdf
trunk/edk2/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-UniCore.fdf
trunk/edk2/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb.dsc.inc
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA15-A7.dsc
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA15-A7.fdf
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.dsc
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.fdf
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15.dsc
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15.fdf
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15_MPCore.dsc
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15_MPCore.fdf
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.dsc
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.fdf
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4-foundation.dsc
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4-foundation.fdf
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4.dsc
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4.fdf
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc
Added Paths:
-----------
trunk/edk2/ArmPkg/Drivers/ArmGic/
trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGic.c
trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicDxe.c
trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicLib.inf
trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicNonSec.c
trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicSec.c
trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf
Removed Paths:
-------------
trunk/edk2/ArmPkg/Drivers/PL390Gic/
Modified: trunk/edk2/ArmPkg/ArmPkg.dec
===================================================================
--- trunk/edk2/ArmPkg/ArmPkg.dec 2013-10-29 06:09:46 UTC (rev 14809)
+++ trunk/edk2/ArmPkg/ArmPkg.dec 2013-10-29 06:36:34 UTC (rev 14810)
@@ -81,7 +81,7 @@
gArmTokenSpaceGuid.PcdCpuResetAddress|0x00000000|UINT32|0x00000005
#
- # ARM PL390 General Interrupt Controller
+ # ARM General Interrupt Controller
#
gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000000C
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000000D
Modified: trunk/edk2/ArmPkg/ArmPkg.dsc
===================================================================
--- trunk/edk2/ArmPkg/ArmPkg.dsc 2013-10-29 06:09:46 UTC (rev 14809)
+++ trunk/edk2/ArmPkg/ArmPkg.dsc 2013-10-29 06:36:34 UTC (rev 14810)
@@ -62,7 +62,7 @@
DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf
CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
- ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf
+ ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf
ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
@@ -119,9 +119,9 @@
ArmPkg/Drivers/CpuDxe/CpuDxe.inf
ArmPkg/Drivers/CpuPei/CpuPei.inf
- ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
- ArmPkg/Drivers/PL390Gic/PL390GicLib.inf
- ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf
+ ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
+ ArmPkg/Drivers/ArmGic/ArmGicLib.inf
+ ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf
ArmPkg/Drivers/TimerDxe/TimerDxe.inf
ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
Added: trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGic.c
===================================================================
--- trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGic.c (rev 0)
+++ trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGic.c 2013-10-29 06:36:34 UTC (rev
14810)
@@ -0,0 +1,70 @@
+/** @file
+*
+* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD
License
+* which accompanies this distribution. The full text of the license may be
found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
IMPLIED.
+*
+**/
+
+#include <Uefi.h>
+#include <Library/IoLib.h>
+#include <Library/ArmGicLib.h>
+#include <Library/PcdLib.h>
+
+UINTN
+EFIAPI
+ArmGicGetMaxNumInterrupts (
+ IN INTN GicDistributorBase
+ )
+{
+ return 32 * ((MmioRead32 (GicDistributorBase + ARM_GIC_ICDICTR) & 0x1F) + 1);
+}
+
+VOID
+EFIAPI
+ArmGicSendSgiTo (
+ IN INTN GicDistributorBase,
+ IN INTN TargetListFilter,
+ IN INTN CPUTargetList,
+ IN INTN SgiId
+ )
+{
+ MmioWrite32 (GicDistributorBase + ARM_GIC_ICDSGIR, ((TargetListFilter & 0x3)
<< 24) | ((CPUTargetList & 0xFF) << 16) | SgiId);
+}
+
+RETURN_STATUS
+EFIAPI
+ArmGicAcknowledgeInterrupt (
+ IN UINTN GicDistributorBase,
+ IN UINTN GicInterruptInterfaceBase,
+ OUT UINTN *CoreId,
+ OUT UINTN *InterruptId
+ )
+{
+ UINT32 Interrupt;
+
+ // Read the Interrupt Acknowledge Register
+ Interrupt = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
+
+ // Check if it is a valid interrupt ID
+ if ((Interrupt & 0x3FF) < ArmGicGetMaxNumInterrupts (GicDistributorBase)) {
+ // Got a valid SGI number hence signal End of Interrupt by writing to
ICCEOIR
+ MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, Interrupt);
+
+ if (CoreId) {
+ *CoreId = (Interrupt >> 10) & 0x7;
+ }
+ if (InterruptId) {
+ *InterruptId = Interrupt & 0x3FF;
+ }
+ return RETURN_SUCCESS;
+ } else {
+ return RETURN_INVALID_PARAMETER;
+ }
+}
Added: trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicDxe.c
===================================================================
--- trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicDxe.c
(rev 0)
+++ trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicDxe.c 2013-10-29 06:36:34 UTC
(rev 14810)
@@ -0,0 +1,434 @@
+/*++
+
+Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>
+Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>
+Portions copyright (c) 2011-2013, ARM Ltd. All rights reserved.<BR>
+
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD
License
+which accompanies this distribution. The full text of the license may be
found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Module Name:
+
+ Gic.c
+
+Abstract:
+
+ Driver implementing the GIC interrupt controller protocol
+
+--*/
+
+#include <PiDxe.h>
+
+#include <Library/ArmLib.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+#include <Library/PcdLib.h>
+#include <Library/IoLib.h>
+#include <Library/ArmGicLib.h>
+
+#include <Protocol/Cpu.h>
+#include <Protocol/HardwareInterrupt.h>
+
+#define ARM_GIC_DEFAULT_PRIORITY 0x80
+
+extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptProtocol;
+
+//
+// Notifications
+//
+EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;
+
+// Maximum Number of Interrupts
+UINTN mGicNumInterrupts = 0;
+
+HARDWARE_INTERRUPT_HANDLER *gRegisteredInterruptHandlers = NULL;
+
+/**
+ Register Handler for the specified interrupt source.
+
+ @param This Instance pointer for this protocol
+ @param Source Hardware source of the interrupt
+ @param Handler Callback for interrupt. NULL to unregister
+
+ @retval EFI_SUCCESS Source was updated to support Handler.
+ @retval EFI_DEVICE_ERROR Hardware could not be programmed.
+
+**/
+EFI_STATUS
+EFIAPI
+RegisterInterruptSource (
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
+ IN HARDWARE_INTERRUPT_SOURCE Source,
+ IN HARDWARE_INTERRUPT_HANDLER Handler
+ )
+{
+ if (Source > mGicNumInterrupts) {
+ ASSERT(FALSE);
+ return EFI_UNSUPPORTED;
+ }
+
+ if ((Handler == NULL) && (gRegisteredInterruptHandlers[Source] == NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if ((Handler != NULL) && (gRegisteredInterruptHandlers[Source] != NULL)) {
+ return EFI_ALREADY_STARTED;
+ }
+
+ gRegisteredInterruptHandlers[Source] = Handler;
+
+ // If the interrupt handler is unregistered then disable the interrupt
+ if (NULL == Handler){
+ return This->DisableInterruptSource (This, Source);
+ } else {
+ return This->EnableInterruptSource (This, Source);
+ }
+}
+
+/**
+ Enable interrupt source Source.
+
+ @param This Instance pointer for this protocol
+ @param Source Hardware source of the interrupt
+
+ @retval EFI_SUCCESS Source interrupt enabled.
+ @retval EFI_DEVICE_ERROR Hardware could not be programmed.
+
+**/
+EFI_STATUS
+EFIAPI
+EnableInterruptSource (
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
+ IN HARDWARE_INTERRUPT_SOURCE Source
+ )
+{
+ UINT32 RegOffset;
+ UINTN RegShift;
+
+ if (Source > mGicNumInterrupts) {
+ ASSERT(FALSE);
+ return EFI_UNSUPPORTED;
+ }
+
+ // Calculate enable register offset and bit position
+ RegOffset = Source / 32;
+ RegShift = Source % 32;
+
+ // Write set-enable register
+ MmioWrite32 (PcdGet32(PcdGicDistributorBase) + ARM_GIC_ICDISER +
(4*RegOffset), 1 << RegShift);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Disable interrupt source Source.
+
+ @param This Instance pointer for this protocol
+ @param Source Hardware source of the interrupt
+
+ @retval EFI_SUCCESS Source interrupt disabled.
+ @retval EFI_DEVICE_ERROR Hardware could not be programmed.
+
+**/
+EFI_STATUS
+EFIAPI
+DisableInterruptSource (
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
+ IN HARDWARE_INTERRUPT_SOURCE Source
+ )
+{
+ UINT32 RegOffset;
+ UINTN RegShift;
+
+ if (Source > mGicNumInterrupts) {
+ ASSERT(FALSE);
+ return EFI_UNSUPPORTED;
+ }
+
+ // Calculate enable register offset and bit position
+ RegOffset = Source / 32;
+ RegShift = Source % 32;
+
+ // Write set-enable register
+ MmioWrite32 (PcdGet32(PcdGicDistributorBase) + ARM_GIC_ICDICER +
(4*RegOffset), 1 << RegShift);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Return current state of interrupt source Source.
+
+ @param This Instance pointer for this protocol
+ @param Source Hardware source of the interrupt
+ @param InterruptState TRUE: source enabled, FALSE: source disabled.
+
+ @retval EFI_SUCCESS InterruptState is valid
+ @retval EFI_DEVICE_ERROR InterruptState is not valid
+
+**/
+EFI_STATUS
+EFIAPI
+GetInterruptSourceState (
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
+ IN HARDWARE_INTERRUPT_SOURCE Source,
+ IN BOOLEAN *InterruptState
+ )
+{
+ UINT32 RegOffset;
+ UINTN RegShift;
+
+ if (Source > mGicNumInterrupts) {
+ ASSERT(FALSE);
+ return EFI_UNSUPPORTED;
+ }
+
+ // calculate enable register offset and bit position
+ RegOffset = Source / 32;
+ RegShift = Source % 32;
+
+ if ((MmioRead32 (PcdGet32(PcdGicDistributorBase) + ARM_GIC_ICDISER +
(4*RegOffset)) & (1<<RegShift)) == 0) {
+ *InterruptState = FALSE;
+ } else {
+ *InterruptState = TRUE;
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Signal to the hardware that the End Of Intrrupt state
+ has been reached.
+
+ @param This Instance pointer for this protocol
+ @param Source Hardware source of the interrupt
+
+ @retval EFI_SUCCESS Source interrupt EOI'ed.
+ @retval EFI_DEVICE_ERROR Hardware could not be programmed.
+
+**/
+EFI_STATUS
+EFIAPI
+EndOfInterrupt (
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
+ IN HARDWARE_INTERRUPT_SOURCE Source
+ )
+{
+ if (Source > mGicNumInterrupts) {
+ ASSERT(FALSE);
+ return EFI_UNSUPPORTED;
+ }
+
+ MmioWrite32 (PcdGet32(PcdGicInterruptInterfaceBase) + ARM_GIC_ICCEIOR,
Source);
+ return EFI_SUCCESS;
+}
+
+/**
+ EFI_CPU_INTERRUPT_HANDLER that is called when a processor interrupt occurs.
+
+ @param InterruptType Defines the type of interrupt or exception that
+ occurred on the processor.This parameter is
processor architecture specific.
+ @param SystemContext A pointer to the processor context when
+ the interrupt occurred on the processor.
+
+ @return None
+
+**/
+VOID
+EFIAPI
+IrqInterruptHandler (
+ IN EFI_EXCEPTION_TYPE InterruptType,
+ IN EFI_SYSTEM_CONTEXT SystemContext
+ )
+{
+ UINT32 GicInterrupt;
+ HARDWARE_INTERRUPT_HANDLER InterruptHandler;
+
+ GicInterrupt = MmioRead32 (PcdGet32(PcdGicInterruptInterfaceBase) +
ARM_GIC_ICCIAR);
+
+ // Special Interrupts (ID1020-ID1023) have an Interrupt ID greater than the
number of interrupt (ie: Spurious interrupt).
+ if (GicInterrupt >= mGicNumInterrupts) {
+ // The special interrupt do not need to be acknowledge
+ return;
+ }
+
+ InterruptHandler = gRegisteredInterruptHandlers[GicInterrupt];
+ if (InterruptHandler != NULL) {
+ // Call the registered interrupt handler.
+ InterruptHandler (GicInterrupt, SystemContext);
+ } else {
+ DEBUG ((EFI_D_ERROR, "Spurious GIC interrupt: 0x%x\n", GicInterrupt));
+ }
+
+ EndOfInterrupt (&gHardwareInterruptProtocol, GicInterrupt);
+}
+
+//
+// Making this global saves a few bytes in image size
+//
+EFI_HANDLE gHardwareInterruptHandle = NULL;
+
+//
+// The protocol instance produced by this driver
+//
+EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptProtocol = {
+ RegisterInterruptSource,
+ EnableInterruptSource,
+ DisableInterruptSource,
+ GetInterruptSourceState,
+ EndOfInterrupt
+};
+
+/**
+ Shutdown our hardware
+
+ DXE Core will disable interrupts and turn off the timer and disable
interrupts
+ after all the event handlers have run.
+
+ @param[in] Event The Event that is being processed
+ @param[in] Context Event Context
+**/
+VOID
+EFIAPI
+ExitBootServicesEvent (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ UINTN Index;
+
+ // Acknowledge all pending interrupts
+ for (Index = 0; Index < mGicNumInterrupts; Index++) {
+ DisableInterruptSource (&gHardwareInterruptProtocol, Index);
+ }
+
+ for (Index = 0; Index < mGicNumInterrupts; Index++) {
+ EndOfInterrupt (&gHardwareInterruptProtocol, Index);
+ }
+
+ // Disable Gic Interface
+ MmioWrite32 (PcdGet32(PcdGicInterruptInterfaceBase) + ARM_GIC_ICCICR, 0x0);
+ MmioWrite32 (PcdGet32(PcdGicInterruptInterfaceBase) + ARM_GIC_ICCPMR, 0x0);
+
+ // Disable Gic Distributor
+ MmioWrite32 (PcdGet32(PcdGicDistributorBase) + ARM_GIC_ICDDCR, 0x0);
+}
+
+/**
+ Initialize the state information for the CPU Architectural Protocol
+
+ @param ImageHandle of the loaded driver
+ @param SystemTable Pointer to the System Table
+
+ @retval EFI_SUCCESS Protocol registered
+ @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure
+ @retval EFI_DEVICE_ERROR Hardware problems
+
+**/
+EFI_STATUS
+InterruptDxeInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ UINTN Index;
+ UINT32 RegOffset;
+ UINTN RegShift;
+ EFI_CPU_ARCH_PROTOCOL *Cpu;
+ UINT32 CpuTarget;
+
+ // Make sure the Interrupt Controller Protocol is not already installed in
the system.
+ ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid);
+
+ mGicNumInterrupts = ArmGicGetMaxNumInterrupts
(PcdGet32(PcdGicDistributorBase));
+
+ for (Index = 0; Index < mGicNumInterrupts; Index++) {
+ DisableInterruptSource (&gHardwareInterruptProtocol, Index);
+
+ // Set Priority
+ RegOffset = Index / 4;
+ RegShift = (Index % 4) * 8;
+ MmioAndThenOr32 (
+ PcdGet32(PcdGicDistributorBase) + ARM_GIC_ICDIPR + (4*RegOffset),
+ ~(0xff << RegShift),
+ ARM_GIC_DEFAULT_PRIORITY << RegShift
+ );
+ }
+
+ //
+ // Targets the interrupts to the Primary Cpu
+ //
+
+ // Only Primary CPU will run this code. We can identify our GIC CPU ID by
reading
+ // the GIC Distributor Target register. The 8 first GICD_ITARGETSRn are
banked to each
+ // connected CPU. These 8 registers hold the CPU targets fields for
interrupts 0-31.
+ // More Info in the GIC Specification about "Interrupt Processor Targets
Registers"
+ //
+ // Read the first Interrupt Processor Targets Register (that corresponds to
the 4
+ // first SGIs)
+ CpuTarget = MmioRead32 (PcdGet32 (PcdGicDistributorBase) + ARM_GIC_ICDIPTR);
+
+ // The CPU target is a bit field mapping each CPU to a GIC CPU Interface.
This value
+ // is 0 when we run on a uniprocessor platform.
+ if (CpuTarget != 0) {
+ // The 8 first Interrupt Processor Targets Registers are read-only
+ for (Index = 8; Index < (mGicNumInterrupts / 4); Index++) {
+ MmioWrite32 (PcdGet32 (PcdGicDistributorBase) + ARM_GIC_ICDIPTR + (Index
* 4), CpuTarget);
+ }
+ }
+
+ // Set binary point reg to 0x7 (no preemption)
+ MmioWrite32 (PcdGet32(PcdGicInterruptInterfaceBase) + ARM_GIC_ICCBPR, 0x7);
+
+ // Set priority mask reg to 0xff to allow all priorities through
+ MmioWrite32 (PcdGet32(PcdGicInterruptInterfaceBase) + ARM_GIC_ICCPMR, 0xff);
+
+ // Enable gic cpu interface
+ MmioWrite32 (PcdGet32(PcdGicInterruptInterfaceBase) + ARM_GIC_ICCICR, 0x1);
+
+ // Enable gic distributor
+ MmioWrite32 (PcdGet32(PcdGicDistributorBase) + ARM_GIC_ICDDCR, 0x1);
+
+ // Initialize the array for the Interrupt Handlers
+ gRegisteredInterruptHandlers = (HARDWARE_INTERRUPT_HANDLER*)AllocateZeroPool
(sizeof(HARDWARE_INTERRUPT_HANDLER) * mGicNumInterrupts);
+
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &gHardwareInterruptHandle,
+ &gHardwareInterruptProtocolGuid,
&gHardwareInterruptProtocol,
+ NULL
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Get the CPU protocol that this driver requires.
+ //
+ Status = gBS->LocateProtocol(&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu);
+ ASSERT_EFI_ERROR(Status);
+
+ //
+ // Unregister the default exception handler.
+ //
+ Status = Cpu->RegisterInterruptHandler(Cpu, ARM_ARCH_EXCEPTION_IRQ, NULL);
+ ASSERT_EFI_ERROR(Status);
+
+ //
+ // Register to receive interrupts
+ //
+ Status = Cpu->RegisterInterruptHandler(Cpu, ARM_ARCH_EXCEPTION_IRQ,
IrqInterruptHandler);
+ ASSERT_EFI_ERROR(Status);
+
+ // Register for an ExitBootServicesEvent
+ Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY,
ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent);
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
Added: trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
===================================================================
--- trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
(rev 0)
+++ trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicDxe.inf 2013-10-29 06:36:34 UTC
(rev 14810)
@@ -0,0 +1,56 @@
+#/** @file
+#
+# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2012, ARM Ltd. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD
License
+# which accompanies this distribution. The full text of the license may be
found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
IMPLIED.
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmGicDxe
+ FILE_GUID = DE371F7C-DEC4-4D21-ADF1-593ABCC15882
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+
+ ENTRY_POINT = InterruptDxeInitialize
+
+
+[Sources.common]
+ ArmGic.c
+ ArmGicDxe.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ ArmPkg/ArmPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ UefiLib
+ UefiBootServicesTableLib
+ DebugLib
+ PrintLib
+ MemoryAllocationLib
+ UefiDriverEntryPoint
+ IoLib
+
+[Protocols]
+ gHardwareInterruptProtocolGuid
+ gEfiCpuArchProtocolGuid
+
+[FixedPcd.common]
+ gArmTokenSpaceGuid.PcdGicDistributorBase
+ gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
+
+ gArmTokenSpaceGuid.PcdArmPrimaryCore
+
+[Depex]
+ gEfiCpuArchProtocolGuid
Added: trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicLib.inf
===================================================================
--- trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicLib.inf
(rev 0)
+++ trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicLib.inf 2013-10-29 06:36:34 UTC
(rev 14810)
@@ -0,0 +1,31 @@
+#/* @file
+# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD
License
+# which accompanies this distribution. The full text of the license may be
found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
IMPLIED.
+#
+#*/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmGicLib
+ FILE_GUID = 03d05ee4-cdeb-458c-9dfc-993f09bdf405
+ MODULE_TYPE = SEC
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmGicLib
+
+[Sources]
+ ArmGic.c
+ ArmGicNonSec.c
+
+[LibraryClasses]
+ IoLib
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ MdePkg/MdePkg.dec
Added: trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicNonSec.c
===================================================================
--- trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicNonSec.c
(rev 0)
+++ trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicNonSec.c 2013-10-29 06:36:34 UTC
(rev 14810)
@@ -0,0 +1,44 @@
+/** @file
+*
+* Copyright (c) 2011, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD
License
+* which accompanies this distribution. The full text of the license may be
found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
IMPLIED.
+*
+**/
+
+#include <Uefi.h>
+#include <Library/IoLib.h>
+#include <Library/ArmGicLib.h>
+
+
+VOID
+EFIAPI
+ArmGicEnableInterruptInterface (
+ IN INTN GicInterruptInterfaceBase
+ )
+{
+ /*
+ * Enable the CPU interface in Non-Secure world
+ * Note: The ICCICR register is banked when Security extensions are
implemented
+ */
+ MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, 0x1);
+}
+
+VOID
+EFIAPI
+ArmGicEnableDistributor (
+ IN INTN GicDistributorBase
+ )
+{
+ /*
+ * Enable GIC distributor in Non-Secure world.
+ * Note: The ICDDCR register is banked when Security extensions are
implemented
+ */
+ MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x1);
+}
Added: trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicSec.c
===================================================================
--- trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicSec.c
(rev 0)
+++ trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicSec.c 2013-10-29 06:36:34 UTC
(rev 14810)
@@ -0,0 +1,133 @@
+/** @file
+*
+* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD
License
+* which accompanies this distribution. The full text of the license may be
found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
IMPLIED.
+*
+**/
+
+#include <Base.h>
+#include <Library/ArmLib.h>
+#include <Library/ArmPlatformLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/ArmGicLib.h>
+
+/*
+ * This function configures the all interrupts to be Non-secure.
+ *
+ */
+VOID
+EFIAPI
+ArmGicSetupNonSecure (
+ IN UINTN MpId,
+ IN INTN GicDistributorBase,
+ IN INTN GicInterruptInterfaceBase
+ )
+{
+ UINTN InterruptId;
+ UINTN CachedPriorityMask;
+ UINTN Index;
+
+ CachedPriorityMask = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR);
+
+ // Set priority Mask so that no interrupts get through to CPU
+ MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0);
+
+ InterruptId = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
+
+ // Only try to clear valid interrupts. Ignore spurious interrupts.
+ while ((InterruptId & 0x3FF) < ArmGicGetMaxNumInterrupts
(GicDistributorBase)) {
+ // Some of the SGI's are still pending, read Ack register and send End of
Interrupt Signal
+ MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, InterruptId);
+
+ // Next
+ InterruptId = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
+ }
+
+ // Only the primary core should set the Non Secure bit to the SPIs (Shared
Peripheral Interrupt).
+ if (ArmPlatformIsPrimaryCore (MpId)) {
+ // Ensure all GIC interrupts are Non-Secure
+ for (Index = 0; Index < (ArmGicGetMaxNumInterrupts (GicDistributorBase) /
32); Index++) {
+ MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4),
0xffffffff);
+ }
+ } else {
+ // The secondary cores only set the Non Secure bit to their banked PPIs
+ MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR, 0xffffffff);
+ }
+
+ // Ensure all interrupts can get through the priority mask
+ MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, CachedPriorityMask);
+}
+
+/*
+ * This function configures the interrupts set by the mask to be secure.
+ *
+ */
+VOID
+EFIAPI
+ArmGicSetSecureInterrupts (
+ IN UINTN GicDistributorBase,
+ IN UINTN* GicSecureInterruptMask,
+ IN UINTN GicSecureInterruptMaskSize
+ )
+{
+ UINTN Index;
+ UINT32 InterruptStatus;
+
+ // We must not have more interrupts defined by the mask than the number of
available interrupts
+ ASSERT(GicSecureInterruptMaskSize <= (ArmGicGetMaxNumInterrupts
(GicDistributorBase) / 32));
+
+ // Set all the interrupts defined by the mask as Secure
+ for (Index = 0; Index < GicSecureInterruptMaskSize; Index++) {
+ InterruptStatus = MmioRead32 (GicDistributorBase + ARM_GIC_ICDISR + (Index
* 4));
+ MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4),
InterruptStatus & (~GicSecureInterruptMask[Index]));
+ }
+}
+
+VOID
+EFIAPI
+ArmGicEnableInterruptInterface (
+ IN INTN GicInterruptInterfaceBase
+ )
+{
+ // Set Priority Mask to allow interrupts
+ MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0x000000FF);
+
+ // Enable CPU interface in Secure world
+ // Enable CPU interface in Non-secure World
+ // Signal Secure Interrupts to CPU using FIQ line *
+ MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR,
+ ARM_GIC_ICCICR_ENABLE_SECURE |
+ ARM_GIC_ICCICR_ENABLE_NS |
+ ARM_GIC_ICCICR_SIGNAL_SECURE_TO_FIQ);
+}
+
+VOID
+EFIAPI
+ArmGicDisableInterruptInterface (
+ IN INTN GicInterruptInterfaceBase
+ )
+{
+ UINT32 ControlValue;
+
+ // Disable CPU interface in Secure world and Non-secure World
+ ControlValue = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR);
+ MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, ControlValue &
~(ARM_GIC_ICCICR_ENABLE_SECURE | ARM_GIC_ICCICR_ENABLE_NS));
+}
+
+VOID
+EFIAPI
+ArmGicEnableDistributor (
+ IN INTN GicDistributorBase
+ )
+{
+ // Turn on the GIC distributor
+ MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 1);
+}
Added: trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf
===================================================================
--- trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf
(rev 0)
+++ trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf 2013-10-29 06:36:34 UTC
(rev 14810)
@@ -0,0 +1,38 @@
+#/* @file
+# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD
License
+# which accompanies this distribution. The full text of the license may be
found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
IMPLIED.
+#
+#*/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmGicSecLib
+ FILE_GUID = 85f3cf80-b5f4-11df-9855-0002a5d5c51b
+ MODULE_TYPE = SEC
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmGicLib
+
+[Sources]
+ ArmGic.c
+ ArmGicSec.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+
+[LibraryClasses]
+ ArmLib
+ ArmPlatformLib
+ DebugLib
+ IoLib
+ PcdLib
+
Modified: trunk/edk2/ArmPkg/Include/Library/ArmGicLib.h
===================================================================
--- trunk/edk2/ArmPkg/Include/Library/ArmGicLib.h 2013-10-29 06:09:46 UTC
(rev 14809)
+++ trunk/edk2/ArmPkg/Include/Library/ArmGicLib.h 2013-10-29 06:36:34 UTC
(rev 14810)
@@ -12,8 +12,8 @@
*
**/
-#ifndef __PL390GIC_H
-#define __PL390GIC_H
+#ifndef __ARMGIC_H
+#define __ARMGIC_H
//
// GIC definitions
Modified: trunk/edk2/ArmPlatformPkg/ArmPlatformPkg-2ndstage.dsc
===================================================================
--- trunk/edk2/ArmPlatformPkg/ArmPlatformPkg-2ndstage.dsc 2013-10-29
06:09:46 UTC (rev 14809)
+++ trunk/edk2/ArmPlatformPkg/ArmPlatformPkg-2ndstage.dsc 2013-10-29
06:36:34 UTC (rev 14810)
@@ -77,7 +77,7 @@
CpuExceptionHandlerLib|MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLibNull.inf
ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
- ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf
+ ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf
ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPlatformStackLib.inf
ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
Modified: trunk/edk2/ArmPlatformPkg/ArmPlatformPkg.dsc
===================================================================
--- trunk/edk2/ArmPlatformPkg/ArmPlatformPkg.dsc 2013-10-29 06:09:46 UTC
(rev 14809)
+++ trunk/edk2/ArmPlatformPkg/ArmPlatformPkg.dsc 2013-10-29 06:36:34 UTC
(rev 14810)
@@ -77,7 +77,7 @@
CpuExceptionHandlerLib|MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLibNull.inf
ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
- ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf
+ ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf
ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
@@ -353,7 +353,7 @@
ArmPlatformPkg/Sec/Sec.inf {
<LibraryClasses>
# Use the implementation which set the Secure bits
- ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf
+ ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf
}
#
Modified: trunk/edk2/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A8.dsc
===================================================================
--- trunk/edk2/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A8.dsc
2013-10-29 06:09:46 UTC (rev 14809)
+++ trunk/edk2/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A8.dsc
2013-10-29 06:36:34 UTC (rev 14810)
@@ -123,7 +123,7 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x10009000
#
- # ARM PL390 General Interrupt Controller
+ # ARM General Interrupt Controller
#
gArmTokenSpaceGuid.PcdGicDistributorBase|0x10041000
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x10040000
@@ -142,7 +142,7 @@
ArmPlatformPkg/Sec/Sec.inf {
<LibraryClasses>
# Use the implementation which set the Secure bits
- ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf
+ ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf
}
#
@@ -211,7 +211,7 @@
MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
EmbeddedPkg/SerialDxe/SerialDxe.inf
- ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
+ ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
Modified: trunk/edk2/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A9x2.dsc
===================================================================
--- trunk/edk2/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A9x2.dsc
2013-10-29 06:09:46 UTC (rev 14809)
+++ trunk/edk2/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A9x2.dsc
2013-10-29 06:36:34 UTC (rev 14810)
@@ -122,7 +122,7 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x10009000
#
- # ARM PL390 General Interrupt Controller
+ # ARM General Interrupt Controller
#
gArmTokenSpaceGuid.PcdGicDistributorBase|0x1F001000
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x1F000100
@@ -145,7 +145,7 @@
ArmPlatformPkg/Sec/Sec.inf {
<LibraryClasses>
# Use the implementation which set the Secure bits
- ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf
+ ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf
}
#
@@ -211,7 +211,7 @@
MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
EmbeddedPkg/SerialDxe/SerialDxe.inf
- ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
+ ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
Modified:
trunk/edk2/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-MPCore.fdf
===================================================================
--- trunk/edk2/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-MPCore.fdf
2013-10-29 06:09:46 UTC (rev 14809)
+++ trunk/edk2/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-MPCore.fdf
2013-10-29 06:36:34 UTC (rev 14810)
@@ -138,7 +138,7 @@
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
INF EmbeddedPkg/SerialDxe/SerialDxe.inf
- INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
+ INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
INF ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf
INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
Modified:
trunk/edk2/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-UniCore.fdf
===================================================================
--- trunk/edk2/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-UniCore.fdf
2013-10-29 06:09:46 UTC (rev 14809)
+++ trunk/edk2/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-UniCore.fdf
2013-10-29 06:36:34 UTC (rev 14810)
@@ -139,7 +139,7 @@
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
INF EmbeddedPkg/SerialDxe/SerialDxe.inf
- INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
+ INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
INF ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf
INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
Modified: trunk/edk2/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb.dsc.inc
===================================================================
--- trunk/edk2/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb.dsc.inc
2013-10-29 06:09:46 UTC (rev 14809)
+++ trunk/edk2/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb.dsc.inc
2013-10-29 06:36:34 UTC (rev 14810)
@@ -60,7 +60,7 @@
CpuExceptionHandlerLib|MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLibNull.inf
ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
- ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf
+ ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf
ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
# RealView Emulation Board Specific Libraries
Modified: trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA15-A7.dsc
===================================================================
--- trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA15-A7.dsc
2013-10-29 06:09:46 UTC (rev 14809)
+++ trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA15-A7.dsc
2013-10-29 06:36:34 UTC (rev 14810)
@@ -39,8 +39,8 @@
#DebugAgentTimerLib|ArmPlatformPkg/ArmVExpressPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf
- # ARM PL390 General Interrupt Driver in Secure and Non-secure
- ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf
+ # ARM General Interrupt Driver in Secure and Non-secure
+ ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf
LcdPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf
@@ -163,7 +163,7 @@
#
- # ARM PL390 General Interrupt Controller
+ # ARM General Interrupt Controller
#
gArmTokenSpaceGuid.PcdGicDistributorBase|0x2C001000
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x2C002000
@@ -242,7 +242,7 @@
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
- ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
+ ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
#ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/HdLcdGraphicsOutputDxe.inf
Modified: trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA15-A7.fdf
===================================================================
--- trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA15-A7.fdf
2013-10-29 06:09:46 UTC (rev 14809)
+++ trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA15-A7.fdf
2013-10-29 06:36:34 UTC (rev 14810)
@@ -92,7 +92,7 @@
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
INF EmbeddedPkg/SerialDxe/SerialDxe.inf
- INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
+ INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
#INF
ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
Modified: trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.dsc
===================================================================
--- trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.dsc
2013-10-29 06:09:46 UTC (rev 14809)
+++ trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.dsc
2013-10-29 06:36:34 UTC (rev 14810)
@@ -167,7 +167,7 @@
gArmPlatformTokenSpaceGuid.PcdPL180MciBaseAddress|0x10005000
#
- # ARM PL390 General Interrupt Controller
+ # ARM General Interrupt Controller
#
gArmTokenSpaceGuid.PcdGicDistributorBase|0x1e001000
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x1e000100
@@ -204,7 +204,7 @@
ArmPlatformPkg/Sec/Sec.inf {
<LibraryClasses>
# Use the implementation which set the Secure bits
- ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf
+ ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf
}
#
@@ -270,7 +270,7 @@
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
- ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
+ ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf
ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
Modified: trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.fdf
===================================================================
--- trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.fdf
2013-10-29 06:09:46 UTC (rev 14809)
+++ trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.fdf
2013-10-29 06:36:34 UTC (rev 14810)
@@ -166,7 +166,7 @@
INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
- INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
+ INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
INF ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf
INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
Modified: trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15.dsc
===================================================================
--- trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15.dsc
2013-10-29 06:09:46 UTC (rev 14809)
+++ trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15.dsc
2013-10-29 06:36:34 UTC (rev 14810)
@@ -132,7 +132,7 @@
gArmPlatformTokenSpaceGuid.PcdPL180MciBaseAddress|0x1C050000
#
- # ARM PL390 General Interrupt Controller
+ # ARM General Interrupt Controller
#
gArmTokenSpaceGuid.PcdGicDistributorBase|0x2C001000
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x2C002000
@@ -171,7 +171,7 @@
ArmPlatformPkg/Sec/Sec.inf {
<LibraryClasses>
# Use the implementation which set the Secure bits
- ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf
+ ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf
}
#
@@ -237,7 +237,7 @@
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
- ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
+ ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
ArmPkg/Drivers/TimerDxe/TimerDxe.inf
ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
Modified: trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15.fdf
===================================================================
--- trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15.fdf
2013-10-29 06:09:46 UTC (rev 14809)
+++ trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15.fdf
2013-10-29 06:36:34 UTC (rev 14810)
@@ -138,7 +138,7 @@
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
INF EmbeddedPkg/SerialDxe/SerialDxe.inf
- INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
+ INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
Modified:
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15_MPCore.dsc
===================================================================
--- trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15_MPCore.dsc
2013-10-29 06:09:46 UTC (rev 14809)
+++ trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15_MPCore.dsc
2013-10-29 06:36:34 UTC (rev 14810)
@@ -134,7 +134,7 @@
gArmPlatformTokenSpaceGuid.PcdPL180MciBaseAddress|0x1C050000
#
- # ARM PL390 General Interrupt Controller
+ # ARM General Interrupt Controller
#
gArmTokenSpaceGuid.PcdGicDistributorBase|0x2C001000
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x2C002000
@@ -173,7 +173,7 @@
ArmPlatformPkg/Sec/Sec.inf {
<LibraryClasses>
# Use the implementation which set the Secure bits
- ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf
+ ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf
}
#
@@ -239,7 +239,7 @@
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
- ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
+ ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
ArmPkg/Drivers/TimerDxe/TimerDxe.inf
ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
Modified:
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15_MPCore.fdf
===================================================================
--- trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15_MPCore.fdf
2013-10-29 06:09:46 UTC (rev 14809)
+++ trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15_MPCore.fdf
2013-10-29 06:36:34 UTC (rev 14810)
@@ -138,7 +138,7 @@
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
INF EmbeddedPkg/SerialDxe/SerialDxe.inf
- INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
+ INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
Modified: trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.dsc
===================================================================
--- trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.dsc
2013-10-29 06:09:46 UTC (rev 14809)
+++ trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.dsc
2013-10-29 06:36:34 UTC (rev 14810)
@@ -144,7 +144,7 @@
gArmPlatformTokenSpaceGuid.PcdPL180MciBaseAddress|0x1C050000
#
- # ARM PL390 General Interrupt Controller
+ # ARM General Interrupt Controller
#
gArmTokenSpaceGuid.PcdGicDistributorBase|0x2C001000
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x2C000100
@@ -182,7 +182,7 @@
ArmPlatformPkg/Sec/Sec.inf {
<LibraryClasses>
# Use the implementation which set the Secure bits
- ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf
+ ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf
}
#
@@ -248,7 +248,7 @@
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
- ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
+ ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf
ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
Modified: trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.fdf
===================================================================
--- trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.fdf
2013-10-29 06:09:46 UTC (rev 14809)
+++ trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.fdf
2013-10-29 06:36:34 UTC (rev 14810)
@@ -137,7 +137,7 @@
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
INF EmbeddedPkg/SerialDxe/SerialDxe.inf
- INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
+ INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
INF ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf
INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
Modified:
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4-foundation.dsc
===================================================================
---
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4-foundation.dsc
2013-10-29 06:09:46 UTC (rev 14809)
+++
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4-foundation.dsc
2013-10-29 06:36:34 UTC (rev 14810)
@@ -111,7 +111,7 @@
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|38400
#
- # ARM PL390 General Interrupt Controller
+ # ARM General Interrupt Controller
#
gArmTokenSpaceGuid.PcdGicDistributorBase|0x2C001000
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x2C002000
@@ -149,7 +149,7 @@
ArmPlatformPkg/Sec/Sec.inf {
<LibraryClasses>
# Use the implementation which set the Secure bits
- ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf
+ ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf
}
#
@@ -215,7 +215,7 @@
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
- ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
+ ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
ArmPkg/Drivers/TimerDxe/TimerDxe.inf
MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
Modified:
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4-foundation.fdf
===================================================================
---
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4-foundation.fdf
2013-10-29 06:09:46 UTC (rev 14809)
+++
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4-foundation.fdf
2013-10-29 06:36:34 UTC (rev 14810)
@@ -137,7 +137,7 @@
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
INF EmbeddedPkg/SerialDxe/SerialDxe.inf
- INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
+ INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
Modified: trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4.dsc
===================================================================
--- trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4.dsc
2013-10-29 06:09:46 UTC (rev 14809)
+++ trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4.dsc
2013-10-29 06:36:34 UTC (rev 14810)
@@ -133,7 +133,7 @@
gArmPlatformTokenSpaceGuid.PcdPL180MciBaseAddress|0x1C050000
#
- # ARM PL390 General Interrupt Controller
+ # ARM General Interrupt Controller
#
gArmTokenSpaceGuid.PcdGicDistributorBase|0x2C001000
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x2C002000
@@ -171,7 +171,7 @@
ArmPlatformPkg/Sec/Sec.inf {
<LibraryClasses>
# Use the implementation which set the Secure bits
- ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf
+ ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf
}
#
@@ -237,7 +237,7 @@
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
- ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
+ ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
ArmPkg/Drivers/TimerDxe/TimerDxe.inf
ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
Modified: trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4.fdf
===================================================================
--- trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4.fdf
2013-10-29 06:09:46 UTC (rev 14809)
+++ trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4.fdf
2013-10-29 06:36:34 UTC (rev 14810)
@@ -139,7 +139,7 @@
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
INF EmbeddedPkg/SerialDxe/SerialDxe.inf
- INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
+ INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
Modified: trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc
===================================================================
--- trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc
2013-10-29 06:09:46 UTC (rev 14809)
+++ trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc
2013-10-29 06:36:34 UTC (rev 14810)
@@ -60,7 +60,7 @@
CpuExceptionHandlerLib|MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLibNull.inf
ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
- ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf
+ ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf
ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPlatformStackLib.inf
ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
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