Revision: 19174
http://sourceforge.net/p/edk2/code/19174
Author: abiesheuvel
Date: 2015-12-08 15:58:53 +0000 (Tue, 08 Dec 2015)
Log Message:
-----------
ArmPkg: update InvalidateInstructionCacheRange to flush only to PoU
This patch updates the ArmPkg variant of InvalidateInstructionCacheRange to
flush the data cache only to the point of unification (PoU). This improves
performance and also allows invalidation in scenarios where it would be
inappropriate to flush to the point of coherency (like when executing code
from L2 configured as cache-as-ram).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eugene Cohen <[email protected]>
Added AARCH64 and ARM/GCC implementations of the above.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <[email protected]>
Reviewed-by: Eugene Cohen <[email protected]>
Reviewed-by: Leif Lindholm <[email protected]>
Modified Paths:
--------------
trunk/edk2/ArmPkg/Include/Library/ArmLib.h
trunk/edk2/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c
trunk/edk2/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
trunk/edk2/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
trunk/edk2/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm
Modified: trunk/edk2/ArmPkg/Include/Library/ArmLib.h
===================================================================
--- trunk/edk2/ArmPkg/Include/Library/ArmLib.h 2015-12-08 14:16:30 UTC (rev
19173)
+++ trunk/edk2/ArmPkg/Include/Library/ArmLib.h 2015-12-08 15:58:53 UTC (rev
19174)
@@ -183,12 +183,18 @@
VOID
EFIAPI
-ArmCleanDataCacheEntryByMVA (
+ArmCleanDataCacheEntryToPoUByMVA(
IN UINTN Address
);
VOID
EFIAPI
+ArmCleanDataCacheEntryByMVA(
+IN UINTN Address
+);
+
+VOID
+EFIAPI
ArmCleanInvalidateDataCacheEntryByMVA (
IN UINTN Address
);
Modified:
trunk/edk2/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c
===================================================================
--- trunk/edk2/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c
2015-12-08 14:16:30 UTC (rev 19173)
+++ trunk/edk2/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c
2015-12-08 15:58:53 UTC (rev 19174)
@@ -64,7 +64,7 @@
IN UINTN Length
)
{
- CacheRangeOperation (Address, Length, ArmCleanDataCacheEntryByMVA);
+ CacheRangeOperation (Address, Length, ArmCleanDataCacheEntryToPoUByMVA);
ArmInvalidateInstructionCache ();
return Address;
}
Modified: trunk/edk2/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
===================================================================
--- trunk/edk2/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S 2015-12-08
14:16:30 UTC (rev 19173)
+++ trunk/edk2/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S 2015-12-08
15:58:53 UTC (rev 19174)
@@ -22,6 +22,7 @@
GCC_ASM_EXPORT (ArmInvalidateInstructionCache)
GCC_ASM_EXPORT (ArmInvalidateDataCacheEntryByMVA)
GCC_ASM_EXPORT (ArmCleanDataCacheEntryByMVA)
+GCC_ASM_EXPORT (ArmCleanDataCacheEntryToPoUByMVA)
GCC_ASM_EXPORT (ArmCleanInvalidateDataCacheEntryByMVA)
GCC_ASM_EXPORT (ArmInvalidateDataCacheEntryBySetWay)
GCC_ASM_EXPORT (ArmCleanDataCacheEntryBySetWay)
@@ -72,6 +73,11 @@
ret
+ASM_PFX(ArmCleanDataCacheEntryToPoUByMVA):
+ dc cvau, x0 // Clean single data cache line to PoU
+ ret
+
+
ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA):
dc civac, x0 // Clean and invalidate single data cache line
ret
Modified: trunk/edk2/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
===================================================================
--- trunk/edk2/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S 2015-12-08
14:16:30 UTC (rev 19173)
+++ trunk/edk2/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S 2015-12-08
15:58:53 UTC (rev 19174)
@@ -19,6 +19,7 @@
GCC_ASM_EXPORT (ArmInvalidateInstructionCache)
GCC_ASM_EXPORT (ArmInvalidateDataCacheEntryByMVA)
GCC_ASM_EXPORT (ArmCleanDataCacheEntryByMVA)
+GCC_ASM_EXPORT (ArmCleanDataCacheEntryToPoUByMVA)
GCC_ASM_EXPORT (ArmCleanInvalidateDataCacheEntryByMVA)
GCC_ASM_EXPORT (ArmInvalidateDataCacheEntryBySetWay)
GCC_ASM_EXPORT (ArmCleanDataCacheEntryBySetWay)
@@ -69,6 +70,11 @@
bx lr
+ASM_PFX(ArmCleanDataCacheEntryToPoUByMVA):
+ mcr p15, 0, r0, c7, c11, 1 @clean single data cache line to PoU
+ bx lr
+
+
ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA):
mcr p15, 0, r0, c7, c14, 1 @clean and invalidate single data cache line
bx lr
Modified: trunk/edk2/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm
===================================================================
--- trunk/edk2/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm 2015-12-08
14:16:30 UTC (rev 19173)
+++ trunk/edk2/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm 2015-12-08
15:58:53 UTC (rev 19174)
@@ -34,6 +34,11 @@
bx lr
+ RVCT_ASM_EXPORT ArmCleanDataCacheEntryToPoUByMVA
+ mcr p15, 0, r0, c7, c11, 1 ; clean single data cache line to PoU
+ bx lr
+
+
RVCT_ASM_EXPORT ArmCleanInvalidateDataCacheEntryByMVA
mcr p15, 0, r0, c7, c14, 1 ; clean and invalidate single data cache line
bx lr
------------------------------------------------------------------------------
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