Branch: refs/heads/master
Home: https://github.com/tianocore/edk2
Commit: b57911c84c10e9e374c1b3d30164648f72afdd57
https://github.com/tianocore/edk2/commit/b57911c84c10e9e374c1b3d30164648f72afdd57
Author: Gerd Hoffmann <[email protected]>
Date: 2022-06-03 (Fri, 03 Jun 2022)
Changed paths:
M OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c
Log Message:
-----------
OvmfPkg/FdtPciHostBridgeLib: io range is not mandatory
io range is not mandatory according to pcie spec,
so allow host bridges without io address space.
Signed-off-by: Gerd Hoffmann <[email protected]>
Commit: 47f44097eb4783bccdde6d9f77857894f23a5216
https://github.com/tianocore/edk2/commit/47f44097eb4783bccdde6d9f77857894f23a5216
Author: Gerd Hoffmann <[email protected]>
Date: 2022-06-03 (Fri, 03 Jun 2022)
Changed paths:
M OvmfPkg/Library/PlatformInitLib/MemDetect.c
M OvmfPkg/Library/PlatformInitLib/Platform.c
M OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf
M OvmfPkg/PlatformPei/PlatformPei.inf
Log Message:
-----------
OvmfPkg/Platform: unfix PcdPciExpressBaseAddress
Will be set by FdtPciHostBridgeLib, so it can't be an fixed when we
want use that library.
Signed-off-by: Gerd Hoffmann <[email protected]>
Commit: ad3bafa7d5ec61848e9a86929ba7a7c7cbcc8eff
https://github.com/tianocore/edk2/commit/ad3bafa7d5ec61848e9a86929ba7a7c7cbcc8eff
Author: Gerd Hoffmann <[email protected]>
Date: 2022-06-03 (Fri, 03 Jun 2022)
Changed paths:
M OvmfPkg/QemuVideoDxe/VbeShim.c
Log Message:
-----------
OvmfPkg/Microvm/pcie: no vbeshim please
Those old windows versions which need the vbeshim hack
will not run on microvm anyway.
Signed-off-by: Gerd Hoffmann <[email protected]>
Commit: bd10d4e20143ec776c748cc1f5ffcd3812492800
https://github.com/tianocore/edk2/commit/bd10d4e20143ec776c748cc1f5ffcd3812492800
Author: Gerd Hoffmann <[email protected]>
Date: 2022-06-03 (Fri, 03 Jun 2022)
Changed paths:
M OvmfPkg/Library/PlatformInitLib/MemDetect.c
M OvmfPkg/PlatformPei/Platform.c
Log Message:
-----------
OvmfPkg/Microvm/pcie: mPhysMemAddressWidth tweak
microvm places the 64bit mmio space at the end of the physical address
space. So mPhysMemAddressWidth must be correct, otherwise the pci host
bridge setup throws an error because it thinks the 64bit mmio window is
not addressable.
On microvm we can simply use standard cpuid to figure the address width
because the host-phys-bits option (-cpu ${name},host-phys-bits=on) is
forced to be enabled. Side note: For 'pc' and 'q35' this is not the
case for backward compatibility reasons.
Signed-off-by: Gerd Hoffmann <[email protected]>
Commit: 632574ced10fe184d5665b73c62c959109c39961
https://github.com/tianocore/edk2/commit/632574ced10fe184d5665b73c62c959109c39961
Author: Gerd Hoffmann <[email protected]>
Date: 2022-06-03 (Fri, 03 Jun 2022)
Changed paths:
M OvmfPkg/Microvm/MicrovmX64.dsc
M OvmfPkg/Microvm/README
Log Message:
-----------
OvmfPkg/Microvm/pcie: add pcie support
Link in pcie and host bridge bits. Enables support for PCIe in microvm
(qemu-system-x86_64 -M microvm,pcie=on).
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3777
Signed-off-by: Gerd Hoffmann <[email protected]>
Compare: https://github.com/tianocore/edk2/compare/0223898f3e45...632574ced10f
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