Branch: refs/heads/master
Home: https://github.com/tianocore/edk2
Commit: a78938f2740dd969e2f03846a9bd2167e7e582c3
https://github.com/tianocore/edk2/commit/a78938f2740dd969e2f03846a9bd2167e7e582c3
Author: Dun Tan <[email protected]>
Date: 2023-06-30 (Fri, 30 Jun 2023)
Changed paths:
M OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiDxeVirtualMemory.c
Log Message:
-----------
OvmfPkg:Remove code that apply AddressEncMask to non-leaf entry
Remove code that sets AddressEncMask for non-leaf entries when
modifing smm page table by MemEncryptSevLib. In FvbServicesSmm
driver, it calls MemEncryptSevClearMmioPageEncMask to clear
AddressEncMask bit in page table for a specific range. In AMD
SEV feature, this AddressEncMask bit in page table is used to
indicate if the memory is guest private memory or shared memory.
But all memory accessed by the hardware page table walker is
treated as encrypted, regardless of whether the encryption bit
is present. So remove the code to set the EncMask bit for smm
non-leaf entries doesn't impact AMD SEV feature.
The reason encryption mask should not be set for non-leaf
entries is because CpuPageTableLib doesn't consume encryption
mask PCD. In PiSmmCpuDxeSmm module, it will use CpuPageTableLib
to modify smm page table in next patch. The encryption mask is
overlapped with the PageTableBaseAddress field of non-leaf page
table entries. If the encryption mask is set for smm non-leaf
page table entries, issue happens when CpuPageTableLib code
use the non-leaf entry PageTableBaseAddress field with the
encryption mask set to find the next level page table.
Signed-off-by: Dun Tan <[email protected]>
Cc: Ard Biesheuvel <[email protected]>
Cc: Jiewen Yao <[email protected]>
Cc: Jordan Justen <[email protected]>
Cc: Gerd Hoffmann <[email protected]>
Reviewed-by: Tom Lendacky <[email protected]>
Reviewed-by: Ray Ni <[email protected]>
Commit: 8c9983977676d68466c770846d3e64470b3d8668
https://github.com/tianocore/edk2/commit/8c9983977676d68466c770846d3e64470b3d8668
Author: Dun Tan <[email protected]>
Date: 2023-06-30 (Fri, 30 Jun 2023)
Changed paths:
M MdeModulePkg/Core/PiSmmCore/HeapGuard.c
Log Message:
-----------
MdeModulePkg: Remove other attribute protection in UnsetGuardPage
In UnsetGuardPage(), before SmmReadyToLock, remove NX and RO
memory attribute protection for guarded page since
EfiConventionalMemory in SMRAM is RW and executable before
SmmReadyToLock. If UnsetGuardPage() happens after SmmReadyToLock,
then apply EFI_MEMORY_XP to the guarded page to make sure
EfiConventionalMemory in SMRAM is NX since EfiConventionalMemory
in SMRAM is marked as NX in PiSmmCpuDxe driver when SmmReadyToLock.
Signed-off-by: Dun Tan <[email protected]>
Cc: Liming Gao <[email protected]>
Cc: Ray Ni <[email protected]>
Reviewed-by: Jian J Wang <[email protected]>
Cc: Ard Biesheuvel <[email protected]>
Commit: 2d212083d048ee8c0f5b4b7c61720f16165427cb
https://github.com/tianocore/edk2/commit/2d212083d048ee8c0f5b4b7c61720f16165427cb
Author: Dun Tan <[email protected]>
Date: 2023-06-30 (Fri, 30 Jun 2023)
Changed paths:
M UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
M UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
M UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
M UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c
M UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
Log Message:
-----------
UefiCpuPkg: Use CpuPageTableLib to convert SMM paging attribute.
Simplify the ConvertMemoryPageAttributes API to convert paging
attribute by CpuPageTableLib. In the new API, it calls
PageTableMap() to update the page attributes of a memory range.
With the PageTableMap() API in CpuPageTableLib, we can remove
the complicated page table manipulating code.
Signed-off-by: Dun Tan <[email protected]>
Cc: Eric Dong <[email protected]>
Reviewed-by: Ray Ni <[email protected]>
Cc: Rahul Kumar <[email protected]>
Cc: Gerd Hoffmann <[email protected]>
Commit: 6585ced55858fbab7c2dda8e61b0de99cb891ec9
https://github.com/tianocore/edk2/commit/6585ced55858fbab7c2dda8e61b0de99cb891ec9
Author: Dun Tan <[email protected]>
Date: 2023-06-30 (Fri, 30 Jun 2023)
Changed paths:
M UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c
Log Message:
-----------
UefiCpuPkg: Add DEBUG_CODE for special case when clear RP
In ConvertMemoryPageAttributes() function, when clear RP for a
specific range [BaseAddress, BaseAddress + Length], it means to
set the present bit to 1 and assign default value for other
attributes in page table. The default attributes for the input
specific range are NX disabled and ReadOnly. If there is existing
present range in [BaseAddress, BaseAddress + Length] and the
attributes are not NX disabled or not ReadOnly, then output the
DEBUG message to indicate that the NX and ReadOnly attributes of
the existing present range are modified in the function.
Signed-off-by: Dun Tan <[email protected]>
Cc: Eric Dong <[email protected]>
Reviewed-by: Ray Ni <[email protected]>
Cc: Rahul Kumar <[email protected]>
Cc: Gerd Hoffmann <[email protected]>
Commit: f51967280bcad35ba15faf8bd24df8a86052ce49
https://github.com/tianocore/edk2/commit/f51967280bcad35ba15faf8bd24df8a86052ce49
Author: Dun Tan <[email protected]>
Date: 2023-06-30 (Fri, 30 Jun 2023)
Changed paths:
M UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c
Log Message:
-----------
UefiCpuPkg/PiSmmCpuDxeSmm: Avoid setting non-present range to RO/NX
In PiSmmCpuDxeSmm code, SetMemMapAttributes() marks memory ranges
in SmmMemoryAttributesTable to RO/NX. There may exist non-present
range in these memory ranges. Set other attributes for a non-present
range is not permitted in CpuPageTableMapLib. So add code to handle
this case. Only map the present ranges in SmmMemoryAttributesTable
to RO or NX.
Signed-off-by: Dun Tan <[email protected]>
Cc: Eric Dong <[email protected]>
Reviewed-by: Ray Ni <[email protected]>
Cc: Rahul Kumar <[email protected]>
Cc: Gerd Hoffmann <[email protected]>
Commit: 7b6e7d009872af68319e9a91725911829cc59fb7
https://github.com/tianocore/edk2/commit/7b6e7d009872af68319e9a91725911829cc59fb7
Author: Dun Tan <[email protected]>
Date: 2023-06-30 (Fri, 30 Jun 2023)
Changed paths:
M UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
M UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c
Log Message:
-----------
UefiCpuPkg/PiSmmCpuDxeSmm: Add 2 function to disable/enable CR0.WP
Add two functions to disable/enable CR0.WP. These two unctions
will also be used in later commits. This commit doesn't change any
functionality.
Signed-off-by: Dun Tan <[email protected]>
Cc: Eric Dong <[email protected]>
Reviewed-by: Ray Ni <[email protected]>
Cc: Rahul Kumar <[email protected]>
Cc: Gerd Hoffmann <[email protected]>
Commit: ef64ae06f8065eba5981cfcf0817a006933a306a
https://github.com/tianocore/edk2/commit/ef64ae06f8065eba5981cfcf0817a006933a306a
Author: Dun Tan <[email protected]>
Date: 2023-06-30 (Fri, 30 Jun 2023)
Changed paths:
M UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c
M UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
Log Message:
-----------
UefiCpuPkg/PiSmmCpuDxeSmm: Clear CR0.WP before modify page table
Clear CR0.WP before modify smm page table. Currently, there is
an assumption that smm pagetable is always RW before ReadyToLock.
However, when AMD SEV is enabled, FvbServicesSmm driver calls
MemEncryptSevClearMmioPageEncMask to clear AddressEncMask bit
in smm page table for this range:
[PcdOvmfFdBaseAddress,PcdOvmfFdBaseAddress+PcdOvmfFirmwareFdSize]
If page slpit happens in this process, new memory for smm page
table is allocated. Then the newly allocated page table memory
is marked as RO in smm page table in this FvbServicesSmm driver,
which may lead to PF if smm code doesn't clear CR0.WP before
modify smm page table when ReadyToLock.
Signed-off-by: Dun Tan <[email protected]>
Cc: Eric Dong <[email protected]>
Reviewed-by: Ray Ni <[email protected]>
Cc: Rahul Kumar <[email protected]>
Cc: Gerd Hoffmann <[email protected]>
Commit: d706d9c64ac6074f3066f0531b66f59f4991973b
https://github.com/tianocore/edk2/commit/d706d9c64ac6074f3066f0531b66f59f4991973b
Author: Dun Tan <[email protected]>
Date: 2023-06-30 (Fri, 30 Jun 2023)
Changed paths:
M UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c
M UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
M UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
M UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
M UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c
Log Message:
-----------
UefiCpuPkg: Extern mSmmShadowStackSize in PiSmmCpuDxeSmm.h
Extern mSmmShadowStackSize in PiSmmCpuDxeSmm.h and remove
extern for mSmmShadowStackSize in c files to simplify code.
Signed-off-by: Dun Tan <[email protected]>
Cc: Eric Dong <[email protected]>
Reviewed-by: Ray Ni <[email protected]>
Cc: Rahul Kumar <[email protected]>
Cc: Gerd Hoffmann <[email protected]>
Commit: 701b5797b260cbc9477380beb7fb071f3c5c88d1
https://github.com/tianocore/edk2/commit/701b5797b260cbc9477380beb7fb071f3c5c88d1
Author: Dun Tan <[email protected]>
Date: 2023-06-30 (Fri, 30 Jun 2023)
Changed paths:
M UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
M UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
M UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c
M UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
Log Message:
-----------
UefiCpuPkg: Add GenSmmPageTable() to create smm page table
This commit is code refinement to current smm pagetable generation
code. Add a new GenSmmPageTable() API to create smm page table
based on the PageTableMap() API in CpuPageTableLib. Caller only
needs to specify the paging mode and the PhysicalAddressBits to map.
This function can be used to create both IA32 pae paging and X64
5level, 4level paging.
Signed-off-by: Dun Tan <[email protected]>
Cc: Eric Dong <[email protected]>
Reviewed-by: Ray Ni <[email protected]>
Cc: Rahul Kumar <[email protected]>
Cc: Gerd Hoffmann <[email protected]>
Commit: b4dde1ae6a8a573c84a70d197a4a341f7d5bfb3d
https://github.com/tianocore/edk2/commit/b4dde1ae6a8a573c84a70d197a4a341f7d5bfb3d
Author: Dun Tan <[email protected]>
Date: 2023-06-30 (Fri, 30 Jun 2023)
Changed paths:
M UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.c
M UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
M UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.c
Log Message:
-----------
UefiCpuPkg: Use GenSmmPageTable() to create Smm S3 page table
Use GenSmmPageTable() to create both IA32 and X64 Smm S3
page table.
Signed-off-by: Dun Tan <[email protected]>
Cc: Eric Dong <[email protected]>
Reviewed-by: Ray Ni <[email protected]>
Cc: Rahul Kumar <[email protected]>
Cc: Gerd Hoffmann <[email protected]>
Commit: 7132df94aca29caf62b88beb049cd9c169c45c09
https://github.com/tianocore/edk2/commit/7132df94aca29caf62b88beb049cd9c169c45c09
Author: Dun Tan <[email protected]>
Date: 2023-06-30 (Fri, 30 Jun 2023)
Changed paths:
M UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
Log Message:
-----------
UefiCpuPkg: Sort mSmmCpuSmramRanges in FindSmramInfo
Sort mSmmCpuSmramRanges after get the SMRAM info in
FindSmramInfo() function.
Signed-off-by: Dun Tan <[email protected]>
Cc: Eric Dong <[email protected]>
Reviewed-by: Ray Ni <[email protected]>
Cc: Rahul Kumar <[email protected]>
Cc: Gerd Hoffmann <[email protected]>
Commit: b4394cca2dbe41f6adca06d600b330b3a8d7e0fc
https://github.com/tianocore/edk2/commit/b4394cca2dbe41f6adca06d600b330b3a8d7e0fc
Author: Dun Tan <[email protected]>
Date: 2023-06-30 (Fri, 30 Jun 2023)
Changed paths:
M UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
Log Message:
-----------
UefiCpuPkg: Sort mProtectionMemRange when ReadyToLock
Sort mProtectionMemRange in InitProtectedMemRange() when
ReadyToLock.
Signed-off-by: Dun Tan <[email protected]>
Cc: Eric Dong <[email protected]>
Reviewed-by: Ray Ni <[email protected]>
Cc: Rahul Kumar <[email protected]>
Cc: Gerd Hoffmann <[email protected]>
Commit: 4ceefd6dd1334e815d9e8393b727cecfaf441a1f
https://github.com/tianocore/edk2/commit/4ceefd6dd1334e815d9e8393b727cecfaf441a1f
Author: Dun Tan <[email protected]>
Date: 2023-06-30 (Fri, 30 Jun 2023)
Changed paths:
M UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
M UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
Log Message:
-----------
UefiCpuPkg: Refinement to smm runtime InitPaging() code
This commit is code refinement to current smm runtime InitPaging()
page table update code. In InitPaging(), if PcdCpuSmmProfileEnable
is TRUE, use ConvertMemoryPageAttributes() API to map the range in
mProtectionMemRange to the attrbute recorded in the attribute field
of mProtectionMemRange, map the range outside mProtectionMemRange
as non-present. If PcdCpuSmmProfileEnable is FALSE, only need to
set the ranges not in mSmmCpuSmramRanges as NX.
Signed-off-by: Dun Tan <[email protected]>
Cc: Eric Dong <[email protected]>
Reviewed-by: Ray Ni <[email protected]>
Cc: Rahul Kumar <[email protected]>
Cc: Gerd Hoffmann <[email protected]>
Commit: f5c987fcac567b1f84a418826f30d8ef2b46860e
https://github.com/tianocore/edk2/commit/f5c987fcac567b1f84a418826f30d8ef2b46860e
Author: Dun Tan <[email protected]>
Date: 2023-06-30 (Fri, 30 Jun 2023)
Changed paths:
M UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
M UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
M UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c
Log Message:
-----------
UefiCpuPkg/PiSmmCpuDxeSmm: Remove unnecessary function
Remove unnecessary function SetNotPresentPage(). We can directly
use ConvertMemoryPageAttributes to set a range to non-present.
Signed-off-by: Dun Tan <[email protected]>
Cc: Eric Dong <[email protected]>
Reviewed-by: Ray Ni <[email protected]>
Cc: Rahul Kumar <[email protected]>
Cc: Gerd Hoffmann <[email protected]>
Compare: https://github.com/tianocore/edk2/compare/6607062e91f6...f5c987fcac56
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