Branch: refs/heads/master
Home: https://github.com/tianocore/edk2
Commit: ad5030d73171d9aae30ee74c4b2cd41686b93bcd
https://github.com/tianocore/edk2/commit/ad5030d73171d9aae30ee74c4b2cd41686b93bcd
Author: Kedar Athawale <[email protected]>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M ArmPkg/Drivers/ArmPsciMpServicesDxe/MpFuncs.S
Log Message:
-----------
ArmPkg/ArmPsciMpServices: Prevent SIMD traps on secondary cores
On AArch64, PrePi/SEC configures the primary core to avoid trapping
VFP/SIMD exceptions.However, when ArmPsciMpServicesDxe enables secondary
cores, FP/SIMD access is not configured, causing traps on SIMD
instructions.
Set FPEN bits 21:20[1] in CPACR_EL1 for secondary cores to allow FP/SIMD
instructions at EL1 and prevent VFP exceptions from being trapped.
Signed-off-by: Kedar Athawale <[email protected]>
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