Hello,
Starting with SVN revision 18146, CorebootPayload will no longer boot
on my board. The reason is that the code rearrangement of rev 18146
(MdeModulePkg DxeCore: Move ProcessLibraryConstructorList) causes low
memory to be cleared before a call to FindCbTag scans low memory.
Prior to 18146, low memory was cleared after the last use of FindCbTag.
As a result, the low memory scan of FindCbTag no longer finds the
coreboot tag.
This shouldn't be a problem because there is a backup mechanism where
the needed address stored in low memory is saved to PcdCbHeaderPointer:
// Set pcd to save the upper coreboot header in case the dxecore will
// erase 0~4k memory
This mechanism isn't working, for a couple of reasons. First, the DXE
core code that reads the PCD is using a NULL version of the PCD lib.
If this is fixed, it still doesn't work because the PCD lib isn't
loading soon enough. APRIORI doesn't solve the problem:
APRIORI DXE {
INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
}
The DXE core code that tries to read PcdCbHeaderPointer PCD is:
PcdGet32 called by:
CbParseSerialInfo called by:
SerialPortInitialize called by:
ProcessLibraryConstructorList called by:
DxeMain.
Presumably Dynamic PCD access from ProcessLibraryConstructorList is
just not possible.
A temporary solution is to not give the lower 4KB to UEFI:
Index: CbSupportPei.c
===================================================================
--- CbSupportPei.c (revision 18191)
+++ CbSupportPei.c (working copy)
@@ -197,8 +197,9 @@
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
),
- (EFI_PHYSICAL_ADDRESS)(0),
- (UINT64)(0xA0000)
+ // lower 640KB, except for first 4KB where the coreboot tag resides
+ (EFI_PHYSICAL_ADDRESS)(0 + 0x1000),
+ (UINT64)(0xA0000 - 0x1000)
);
This would probably break things if anyone tried to use legacy code
such as CSM or Duet/BiosVideoThunkDxe. Can someone come up with a
better solution?
Thanks,
Scott
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