On 05/10/2015 01:57, Michael Kinney wrote:
> Add module that initializes a CPU for the SMM envirnment and
> installs the first level SMI handler. This module along with the
> SMM IPL and SMM Core provide the services required for
> DXE_SMM_DRIVERS to register hardware and software SMI handlers.
>
> CPU specific features are abstracted through the SmmCpuFeaturesLib
>
> Platform specific features are abstracted through the
> SmmCpuPlatformHookLib
>
> Several PCDs are added to enable/disable features and configure
> settings for the PiSmmCpuDxeSmm module
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Michael Kinney <michael.d.kin...@intel.com>
Hi Michael,
I'm happy to report the first bug! :)
InitPaging() is setting a page directory entry before initializing the
corresponding page table. This works on real hardware (including KVM),
but the TLB of QEMU's emulation mode is different (possibly it has
different associativity, I don't really know) so at some point
execution goes to nowhere's land.
The fix is really simple:
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
index 9463e97..6ee9256 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
@@ -555,12 +555,12 @@ InitPaging (
Pt = AllocatePages (1);
ASSERT (Pt != NULL);
- *Pte = (UINTN)Pt | IA32_PG_RW | IA32_PG_P;
-
// Split it
- for (Level4 = 0; Level4 < SIZE_4KB / sizeof(*Pt); Level4++,
Pt++) {
- *Pt = Address + ((Level4 << 12) | IA32_PG_RW | IA32_PG_P);
+ for (Level4 = 0; Level4 < SIZE_4KB / sizeof(*Pt); Level4++) {
+ Pt[Level4] = Address + ((Level4 << 12) | IA32_PG_RW |
IA32_PG_P);
} // end for PT
+
+ *Pte = (UINTN)Pt | IA32_PG_RW | IA32_PG_P;
} // end if IsAddressSplit
} // end for PTE
} // end for PDE
Thanks,
Paolo
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