On 16 November 2015 at 20:13, Mark Rutland <mark.rutl...@arm.com> wrote:
> On Mon, Nov 16, 2015 at 08:08:18PM +0100, Ard Biesheuvel wrote:
>> On 16 November 2015 at 19:41, Vladimir Olovyannikov
>> <volov...@broadcom.com> wrote:
>> >> -----Original Message-----
>> >> From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
>> >> Sent: Monday, November 16, 2015 10:28 AM
>> >> To: Vladimir Olovyannikov
>> >> Cc: Mark Rutland; edk2-devel@lists.01.org
>> >> Subject: Re: [edk2] Armv8 64bit: System error booting linux from the UEFI
>> >>
>> > [...]
>> >> >
>> >> > Async abort occurs in ArmWriteVBar() called by InitializeDebugAgent(),
>> >> DebugAgentSymbolsBaseLib.c.
>> >> > Prior to this call I can easily enable async aborts with no "bad"
>> >> consequences.
>> >> >
>> >> > Here is the exact instruction causing the SError in the ArmWriteVBar():
>> >> > 2: msr   vbar_el2, x0            // Set the Address of the EL2 Vector 
>> >> > Table in the
>> >> VBAR register
>> >>
>> >> Are you using a release build? If so, you should check whether x0 is
>> >> correctly aligned to 2 KB. The ASSERT() tries to establish that, but
>> >> it is only active in DEBUG builds.
>> >>
>> > Ard, it is a DEBUG build.
>>
>> OK. So that should confirm that x0 is aligned to 2 KB.
>>
>> Perhaps the write to VBAR_EL2 enables the delivery in some way. Could
>> you check the A bit in ESR_EL1 before and after?
>
> Do you mean in DAIF / PSTATE? I'm not sure what ESR_ELx would have to do
> with this.
>

If I am reading the ARM ARM correctly, ISR_EL1.A will be 1 if an
SError interrupt is pending. Is that gated by DAIF / PSTATE in some
way?
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