On 24 March 2016 at 21:30, Leo Duran <leo.du...@amd.com> wrote:
> From: Leendert van Doorn <leend...@paramecium.org>
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Leo Duran <leo.du...@amd.com>
As mentioned in response to the EmbeddedPkg patch that changes to
64-bit accessors for PcdCpuVectorBaseAddress, these patches need to be
merged at commit time, and I will take care of that.
Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
> ---
> ArmPkg/ArmPkg.dec | 4 ++--
> ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c | 4 ++--
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
> index ff4531e..e903066 100644
> --- a/ArmPkg/ArmPkg.dec
> +++ b/ArmPkg/ArmPkg.dec
> @@ -60,7 +60,7 @@
> # On ARM Architecture with the Security Extension, the address for the
> # Vector Table can be mapped anywhere in the memory map. It means we can
> # point the Exception Vector Table to its location in CpuDxe.
> - # By default we copy the Vector Table at PcdGet32(PcdCpuVectorBaseAddress)
> + # By default we copy the Vector Table at PcdGet64(PcdCpuVectorBaseAddress)
> gArmTokenSpaceGuid.PcdRelocateVectorTable|TRUE|BOOLEAN|0x00000022
> # Set this PCD to TRUE if the Exception Vector is changed to add debugger
> support before
> # it has been configured by the CPU DXE
> @@ -90,7 +90,7 @@
> # This PCD will free the unallocated buffers if their size reach this
> threshold.
> # We set the default value to 512MB.
>
> gArmTokenSpaceGuid.PcdArmFreeUncachedMemorySizeThreshold|0x20000000|UINT64|0x00000003
> - gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0xffff0000|UINT32|0x00000004
> + gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0xffff0000|UINT64|0x00000004
> gArmTokenSpaceGuid.PcdCpuResetAddress|0x00000000|UINT32|0x00000005
>
> #
> diff --git a/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c
> b/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c
> index 0cf0766..e8ea1f1 100644
> --- a/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c
> +++ b/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c
> @@ -103,7 +103,7 @@ InitializeCpuExceptionHandlers(
> // if we are requested to copy exceptin handlers to another location
> if (gArmRelocateVectorTable) {
>
> - VectorBase = PcdGet32(PcdCpuVectorBaseAddress);
> + VectorBase = PcdGet64(PcdCpuVectorBaseAddress);
> Status = CopyExceptionHandlers(VectorBase);
>
> }
> @@ -118,7 +118,7 @@ InitializeCpuExceptionHandlers(
> // for encapsulated FVs.
> ASSERT(((UINTN)ExceptionHandlersStart & gExceptionVectorAlignmentMask)
> == 0);
>
> - // We do not copy the Exception Table at
> PcdGet32(PcdCpuVectorBaseAddress). We just set Vector
> + // We do not copy the Exception Table at
> PcdGet64(PcdCpuVectorBaseAddress). We just set Vector
> // Base Address to point into CpuDxe code.
> VectorBase = (UINTN)ExceptionHandlersStart;
>
> --
> 1.9.1
>
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