On 9 May 2016 at 10:22, Mark Rutland <mark.rutl...@arm.com> wrote: > On Sat, May 07, 2016 at 10:43:45AM +0200, Ard Biesheuvel wrote: >> On 6 May 2016 at 19:19, Mark Rutland <mark.rutl...@arm.com> wrote: >> > The LAN9118 driver uses memory fences in a novel but erroneous fashion, >> > due to >> > a misunderstanding of some under-commented code. This series fixes these >> > erroneous uses, documenting the unusual requirements of the LAN9118 chip >> > that >> > lead us to this situation, and introduces new helpers to handle this in a >> > more >> > consistent fashion. >> > >> > The LAN9118 datasheet is publicly available at: >> > >> > http://www.microchip.com/wwwproducts/en/LAN9118 >> > >> >> Thanks a lot for getting to the bottom of this! I particularly like >> the way how you folded the required delays into the MMIO read/write >> functions, which makes the top level code a lot cleaner. >> >> I can't test this, but the code looks fine to me. >>
I'll test it later today on TC2 and Juno R0/1/2. But I like the look of it, it seems like a huge improvement. >> Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org> > > Cheers! > > FWIW, I've tested each patch on Juno R1, and I haven't seen any > regression as a result of this. That said, I haven't been able to > trigger issues even without this series. > That'll be the problem I have too - it works fine for me as it is. I guess Sudeep (CC'd) should give it a test too. > There's another latent bug that this doesn't solve, in that if the PHY > negotiates full-duplex operation (at 100Mb/s or 10Mb/s), but that > appears to be unrelated. > > Thanks, > Mark. _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel