On 2016/7/21 9:52, Haojian Zhuang wrote:
在 07/21/2016 09:51 AM, Haojian Zhuang 写道:
Hi Feng,
I think the main difference is who to handle the CRC bits. In the
designware emmc/sd controller, the whole 128-bit value is loaded into
the four response registers. There's no any shift on the 128-bit value
to remove CRC. (Refer to: drivers/mmc/host/dw_mmc.c).
I mean the implementation in linux. $Linux/drivers/mmc/host/dw_mmc.c
In the eMMC spec, it only mentions R2 response in table.
Bit position [127:1]
Width (bits) 127
Value x
Description CID or CSD register incl.
internal CRC7
It also doesn't mention that we need to shift response value for CSD
register.
So I did this fixing patch. I think that shifting isn't common to
support all eMMC/SD controller IP. Without this patch, the eMMC stack
will only get shifted CSD register value.
It results in parse error.
As I checked the SDHC driver in linux, there's the same logic as you
implemented in EmmcDxe.
Now the question is whether EmmcDxe is designed for common code of all
vendor's IP. If so, we need to provide a GetCsd() callback to handle
different implementations for different vendor. Do you mind that I
append the GetCsd() callback in EFI_SD_MMC_PASS_THRU_PROTOCOL to fix
this issue?
Best Regards
Haojian
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