On Fri, Oct 28, 2016 at 12:42:52PM +0100, Ard Biesheuvel wrote: > The GCC ARM builds have access to ADRL/LDRL macros that emit relative > symbol references, i.e., references that do not require fixing up at > load time (or FV generation time for XIP modules) > > Implement equivalent functionality for RVCT: note that this does not > use movw/movt pairs, but the more compatible add/add/add or add/add/ldr > sequences (which Clang does not support, unfortunately, hence the use > of movw/movt for the GCC toolchain family) > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
Not tested, but looks sensible. Reviewed-by: Leif Lindholm <leif.lindh...@linaro.org> > --- > ArmPkg/Include/AsmMacroIoLib.inc | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/ArmPkg/Include/AsmMacroIoLib.inc > b/ArmPkg/Include/AsmMacroIoLib.inc > index c9cad5230c94..4bc3146fb399 100644 > --- a/ArmPkg/Include/AsmMacroIoLib.inc > +++ b/ArmPkg/Include/AsmMacroIoLib.inc > @@ -26,4 +26,24 @@ > ldr $Reg, =($Data) > MEND > > + MACRO > + adrll $Reg, $Symbol > + add $Reg, pc, #-8 > + RELOC R_ARM_ALU_PC_G0_NC, $Symbol > + add $Reg, $Reg, #-4 > + RELOC R_ARM_ALU_PC_G1_NC, $Symbol > + add $Reg, $Reg, #0 > + RELOC R_ARM_ALU_PC_G2, $Symbol > + MEND > + > + MACRO > + ldrl $Reg, $Symbol > + add $Reg, pc, #-8 > + RELOC R_ARM_ALU_PC_G0_NC, $Symbol > + add $Reg, $Reg, #-4 > + RELOC R_ARM_ALU_PC_G1_NC, $Symbol > + ldr $Reg, [$Reg, #0] > + RELOC R_ARM_LDR_PC_G2, $Symbol > + MEND > + > END > -- > 2.7.4 > _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel