On Thu, Apr 06, 2017 at 07:46:50PM +0100, Ard Biesheuvel wrote:
> >> >> + // VRAM
> >> >> + VirtualMemoryTable[++Index].PhysicalBase =
> >> >> PL111_CLCD_VRAM_MOTHERBOARD_BASE;
> >> >> + VirtualMemoryTable[Index].VirtualBase =
> >> >> PL111_CLCD_VRAM_MOTHERBOARD_BASE;
> >> >> + VirtualMemoryTable[Index].Length = PL111_CLCD_VRAM_MOTHERBOARD_SIZE;
> >> >> + VirtualMemoryTable[Index].Attributes =
> >> >> ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED;
> >> >
> >> > Hmm, looking at this made me a bit confused though. Normal uncached
> >> > memory is certainly bufferable (that's basically what write-combining
> >> > means).
> >> >
> >>
> >> It maps to MAIR attribute encoding 0x44, which translates as
> >>
> >> Normal Memory, Outer Non-Cacheable, Inner Non-Cacheable
> >
> > Exactly - which is definitely "buffered".
> >
> >> > This looks like a naming hangover from ARMv5 translation table format.
> >> > Is it about time we clean this up?
> >>
> >> The whole 'ARM_MEMORY_REGION_xxxx' intermediate namespace should be
> >> removed, I think.
> >
> > That sounds like a good idea to me.
> > There's also _NONSECURE crud in there.
> >
>
> Yes. But I hope you're not saying you want that to be done first
> before this patch can go in?
No, but it may mean it makes sense to add a comment regarding the
Attributes line, since it looks like it's doing the opposite of what
is actually being done.
/
Leif
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