Reviewed-by: Ruiyu Ni <ruiyu...@intel.com> Thanks/Ray
> -----Original Message----- > From: Dong, Eric > Sent: Thursday, August 3, 2017 5:32 PM > To: edk2-devel@lists.01.org > Cc: Fan, Jeff <jeff....@intel.com>; Ni, Ruiyu <ruiyu...@intel.com> > Subject: [Patch 3/7] UefiCpuPkg CpuDxe: Enhance get mtrr mask logic. > > In order to not use the deprecated macro, refine get mtrr mask value logic. > > Cc: Jeff Fan <jeff....@intel.com> > Cc: Ruiyu Ni <ruiyu...@intel.com> > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Eric Dong <eric.d...@intel.com> > --- > UefiCpuPkg/CpuDxe/CpuDxe.c | 13 ++++++------- > 1 file changed, 6 insertions(+), 7 deletions(-) > > diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c > index 8680656..6218670 100644 > --- a/UefiCpuPkg/CpuDxe/CpuDxe.c > +++ b/UefiCpuPkg/CpuDxe/CpuDxe.c > @@ -25,8 +25,8 @@ > BOOLEAN InterruptState = FALSE; > EFI_HANDLE mCpuHandle = NULL; > BOOLEAN mIsFlushingGCD; > -UINT64 mValidMtrrAddressMask = > MTRR_LIB_CACHE_VALID_ADDRESS; > -UINT64 mValidMtrrBitsMask = MTRR_LIB_MSR_VALID_MASK; > +UINT64 mValidMtrrAddressMask; > +UINT64 mValidMtrrBitsMask; > UINT64 mTimerPeriod = 0; > > FIXED_MTRR mFixedMtrrTable[] = { > @@ -510,13 +510,12 @@ InitializeMtrrMask ( > AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL); > > PhysicalAddressBits = (UINT8) RegEax; > - > - mValidMtrrBitsMask = LShiftU64 (1, PhysicalAddressBits) - 1; > - mValidMtrrAddressMask = mValidMtrrBitsMask & 0xfffffffffffff000ULL; > } else { > - mValidMtrrBitsMask = MTRR_LIB_MSR_VALID_MASK; > - mValidMtrrAddressMask = MTRR_LIB_CACHE_VALID_ADDRESS; > + PhysicalAddressBits = 36; > } > + > + mValidMtrrBitsMask = LShiftU64 (1, PhysicalAddressBits) - 1; > + mValidMtrrAddressMask = mValidMtrrBitsMask & 0xfffffffffffff000ULL; > } > > /** > -- > 2.7.0.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel