This function will be used by IntelVTd driver.
Cc: Liming Gao <liming....@intel.com>
Cc: Star Zeng <star.z...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen....@intel.com>
---
MdePkg/Library/BaseCpuLib/BaseCpuLib.inf | 5 ++-
MdePkg/Library/BaseCpuLib/Ebc/CpuSleepFlushTlb.c | 16 ++++++++-
MdePkg/Library/BaseCpuLib/Ia32/CacheLineFlush.nasm | 37 ++++++++++++++++++++
MdePkg/Library/BaseCpuLib/X64/CacheLineFlush.nasm | 37 ++++++++++++++++++++
4 files changed, 93 insertions(+), 2 deletions(-)
diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
index 637a3c5..b43b393 100644
--- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
@@ -4,7 +4,7 @@
# CPU Library implemented using ASM functions for IA-32 and X64,
# PAL CALLs for IPF, and empty functions for EBC.
#
-# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
#
@@ -33,6 +33,8 @@
#
[Sources.IA32]
+ Ia32/CacheLineFlush.nasm
+
Ia32/CpuSleep.c | MSFT
Ia32/CpuFlushTlb.c | MSFT
@@ -45,6 +47,7 @@
Ia32/CpuFlushTlbGcc.c | GCC
[Sources.X64]
+ X64/CacheLineFlush.nasm
X64/CpuFlushTlb.nasm
X64/CpuFlushTlb.asm
X64/CpuSleep.nasm
diff --git a/MdePkg/Library/BaseCpuLib/Ebc/CpuSleepFlushTlb.c
b/MdePkg/Library/BaseCpuLib/Ebc/CpuSleepFlushTlb.c
index de63d63..0c554c2 100644
--- a/MdePkg/Library/BaseCpuLib/Ebc/CpuSleepFlushTlb.c
+++ b/MdePkg/Library/BaseCpuLib/Ebc/CpuSleepFlushTlb.c
@@ -1,7 +1,7 @@
/** @file
Base Library CPU Functions for EBC
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD
License
which accompanies this distribution. The full text of the license may be
found at
@@ -15,6 +15,20 @@
#include <Library/DebugLib.h>
/**
+ Flushes one cache line.
+
+ Flushes one cache line. The size of cache line can be got by CPU register.
+**/
+VOID
+EFIAPI
+CacheLineFlush (
+ IN UINTN Address
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
diff --git a/MdePkg/Library/BaseCpuLib/Ia32/CacheLineFlush.nasm
b/MdePkg/Library/BaseCpuLib/Ia32/CacheLineFlush.nasm
new file mode 100644
index 0000000..a2557ab
--- /dev/null
+++ b/MdePkg/Library/BaseCpuLib/Ia32/CacheLineFlush.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
;
+; Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD
License
+; which accompanies this distribution. The full text of the license may be
found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CacheLineFlush.Asm
+;
+; Abstract:
+;
+; CacheLineFlush function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CacheLineFlush (
+; IN UINTN Address
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(CacheLineFlush)
+ASM_PFX(CacheLineFlush):
+ mov eax, [esp + 4]
+ clflush [eax]
+ ret
+
diff --git a/MdePkg/Library/BaseCpuLib/X64/CacheLineFlush.nasm
b/MdePkg/Library/BaseCpuLib/X64/CacheLineFlush.nasm
new file mode 100644
index 0000000..7cf736e
--- /dev/null
+++ b/MdePkg/Library/BaseCpuLib/X64/CacheLineFlush.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
;
+; Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD
License
+; which accompanies this distribution. The full text of the license may be
found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CacheLineFlush.Asm
+;
+; Abstract:
+;
+; CacheLineFlush function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ DEFAULT REL
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CacheLineFlush (
+; IN UINTN Address
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(CacheLineFlush)
+ASM_PFX(CacheLineFlush):
+ clflush [rcx]
+ ret
+
--
2.7.4.windows.1
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