Extra bits are needed to accomodate all 14 SATA ports
Signed-off-by: Alan Ott <a...@softiron.com>
Contributed-under: TianoCore Contribution Agreement 1.0
---
Silicon/AMD/Styx/AmdStyx.dec | 2 +-
Silicon/AMD/Styx/Drivers/StyxSataPlatformDxe/InitController.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/Silicon/AMD/Styx/AmdStyx.dec b/Silicon/AMD/Styx/AmdStyx.dec
index ddd5bf4..c6eebe6 100644
--- a/Silicon/AMD/Styx/AmdStyx.dec
+++ b/Silicon/AMD/Styx/AmdStyx.dec
@@ -54,7 +54,7 @@
gAmdStyxTokenSpaceGuid.PcdSata0CtrlAxiSlvPort|0xE0300000|UINT32|0x00020000
gAmdStyxTokenSpaceGuid.PcdSata0PortCount|8|UINT8|0x00020001
gAmdStyxTokenSpaceGuid.PcdSataPi|0xFF|UINT32|0x00020002
- gAmdStyxTokenSpaceGuid.PcdSataPortMode|0|UINT16|0x00020003
+ gAmdStyxTokenSpaceGuid.PcdSataPortMode|0|UINT32|0x00020003
gAmdStyxTokenSpaceGuid.PcdSataPortMpsp|TRUE|BOOLEAN|0x00020004
gAmdStyxTokenSpaceGuid.PcdSataSmpsSupport|FALSE|BOOLEAN|0x00020005
gAmdStyxTokenSpaceGuid.PcdSataSssSupport|TRUE|BOOLEAN|0x00020006
diff --git a/Silicon/AMD/Styx/Drivers/StyxSataPlatformDxe/InitController.c
b/Silicon/AMD/Styx/Drivers/StyxSataPlatformDxe/InitController.c
index 1958d91..78c6819 100644
--- a/Silicon/AMD/Styx/Drivers/StyxSataPlatformDxe/InitController.c
+++ b/Silicon/AMD/Styx/Drivers/StyxSataPlatformDxe/InitController.c
@@ -110,8 +110,8 @@ InitializeSataController (
SataChPerSerdes = FixedPcdGet8 (PcdSataNumChPerSerdes);
for (PortNum = 0; PortNum < SataPortCount; PortNum += SataChPerSerdes) {
- EvenPort = (UINT32)(FixedPcdGet16 (PcdSataPortMode) >> (PortNum * 2)) & 3;
- OddPort = (UINT32)(FixedPcdGet16 (PcdSataPortMode) >> ((PortNum+1) * 2)) &
3;
+ EvenPort = (UINT32)(FixedPcdGet32 (PcdSataPortMode) >> (PortNum * 2)) & 3;
+ OddPort = (UINT32)(FixedPcdGet32 (PcdSataPortMode) >> ((PortNum+1) * 2)) &
3;
SataPhyInit ((StartPort + PortNum) / SataChPerSerdes, EvenPort, OddPort);
}
--
2.9.3
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