On Thu, Oct 26, 2017 at 03:19:37AM +0200, Marcin Wojtas wrote: > Changing controller's FIFO default values is not necessary and > possibly can cause instabilities, when using some devices. > Disable the modification and rely on initial settings. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Marcin Wojtas <m...@semihalf.com>
Reviewed-by: Leif Lindholm <leif.lindh...@linaro.org> > --- > Platform/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.c | 16 ---------------- > 1 file changed, 16 deletions(-) > > diff --git a/Platform/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.c > b/Platform/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.c > index 31f207e..6bbe5bc 100755 > --- a/Platform/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.c > +++ b/Platform/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.c > @@ -44,20 +44,6 @@ XenonReadVersion ( > SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, SD_MMC_HC_CTRL_VER, TRUE, > SDHC_REG_SIZE_2B, ControllerVersion); > } > > -STATIC > -VOID > -XenonSetFifo ( > - IN EFI_PCI_IO_PROTOCOL *PciIo > - ) > -{ > - UINTN Data; > - > - // Set FIFO_RTC, FIFO_WTC, FIFO_CS and FIFO_PDLVMC > - Data = SDHC_SLOT_FIFO_DEFAULT_CONFIG; > - > - SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, SDHC_SLOT_FIFO_CTRL, FALSE, > SDHC_REG_SIZE_4B, &Data); > -} > - > // Auto Clock Gating > STATIC > VOID > @@ -634,8 +620,6 @@ XenonInit ( > // Read XENON version > XenonReadVersion (PciIo, &Private->ControllerVersion); > > - XenonSetFifo (PciIo); > - > // Disable auto clock generator > XenonSetAcg (PciIo, FALSE); > > -- > 2.7.4 > _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel