NASM has replaced ASM and S files. Rmove ASM from all modules. Remove S files from the drivers only. After NASM is updated, S files can be removed from Library.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming....@intel.com> --- UefiCpuPkg/CpuDxe/CpuDxe.inf | 4 - UefiCpuPkg/CpuDxe/Ia32/CpuAsm.S | 57 --- UefiCpuPkg/CpuDxe/Ia32/CpuAsm.asm | 58 --- UefiCpuPkg/CpuDxe/X64/CpuAsm.S | 60 --- UefiCpuPkg/CpuDxe/X64/CpuAsm.asm | 54 --- .../Library/BaseUefiCpuLib/BaseUefiCpuLib.inf | 2 - .../Library/BaseUefiCpuLib/Ia32/InitializeFpu.asm | 79 ---- .../Library/BaseUefiCpuLib/X64/InitializeFpu.asm | 62 --- .../DxeCpuExceptionHandlerLib.inf | 2 - .../Ia32/ExceptionHandlerAsm.asm | 467 --------------------- .../PeiCpuExceptionHandlerLib.inf | 2 - .../SecPeiCpuExceptionHandlerLib.inf | 2 - .../SmmCpuExceptionHandlerLib.inf | 2 - .../X64/ExceptionHandlerAsm.asm | 389 ----------------- .../Library/SmmCpuFeaturesLib/Ia32/SmiEntry.asm | 285 ------------- .../SmmCpuFeaturesLib/Ia32/SmiException.asm | 175 -------- .../SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf | 4 - .../Library/SmmCpuFeaturesLib/X64/SmiEntry.asm | 281 ------------- .../Library/SmmCpuFeaturesLib/X64/SmiException.asm | 178 -------- .../Universal/Acpi/S3Resume2Pei/Ia32/AsmFuncs.S | 38 -- .../Universal/Acpi/S3Resume2Pei/Ia32/AsmFuncs.asm | 45 -- .../Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf | 4 - .../Universal/Acpi/S3Resume2Pei/X64/AsmFuncs.S | 37 -- .../Universal/Acpi/S3Resume2Pei/X64/AsmFuncs.asm | 41 -- 24 files changed, 2328 deletions(-) delete mode 100644 UefiCpuPkg/CpuDxe/Ia32/CpuAsm.S delete mode 100644 UefiCpuPkg/CpuDxe/Ia32/CpuAsm.asm delete mode 100644 UefiCpuPkg/CpuDxe/X64/CpuAsm.S delete mode 100644 UefiCpuPkg/CpuDxe/X64/CpuAsm.asm delete mode 100644 UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.asm delete mode 100644 UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm delete mode 100644 UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.asm delete mode 100644 UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.asm delete mode 100644 UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.asm delete mode 100644 UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiException.asm delete mode 100644 UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.asm delete mode 100644 UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.asm delete mode 100644 UefiCpuPkg/Universal/Acpi/S3Resume2Pei/Ia32/AsmFuncs.S delete mode 100644 UefiCpuPkg/Universal/Acpi/S3Resume2Pei/Ia32/AsmFuncs.asm delete mode 100644 UefiCpuPkg/Universal/Acpi/S3Resume2Pei/X64/AsmFuncs.S delete mode 100644 UefiCpuPkg/Universal/Acpi/S3Resume2Pei/X64/AsmFuncs.asm diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.inf b/UefiCpuPkg/CpuDxe/CpuDxe.inf index 02f86b7..13c79d0 100644 --- a/UefiCpuPkg/CpuDxe/CpuDxe.inf +++ b/UefiCpuPkg/CpuDxe/CpuDxe.inf @@ -58,14 +58,10 @@ CpuPageTable.c [Sources.IA32] - Ia32/CpuAsm.asm Ia32/CpuAsm.nasm - Ia32/CpuAsm.S [Sources.X64] - X64/CpuAsm.asm X64/CpuAsm.nasm - X64/CpuAsm.S [Protocols] gEfiCpuArchProtocolGuid ## PRODUCES diff --git a/UefiCpuPkg/CpuDxe/Ia32/CpuAsm.S b/UefiCpuPkg/CpuDxe/Ia32/CpuAsm.S deleted file mode 100644 index e034bc2..0000000 --- a/UefiCpuPkg/CpuDxe/Ia32/CpuAsm.S +++ /dev/null @@ -1,57 +0,0 @@ -#------------------------------------------------------------------------------ -#* -#* Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR> -#* This program and the accompanying materials -#* are licensed and made available under the terms and conditions of the BSD License -#* which accompanies this distribution. The full text of the license may be found at -#* http://opensource.org/licenses/bsd-license.php -#* -#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -#* -#* CpuAsm.S -#* -#* Abstract: -#* -#------------------------------------------------------------------------------ - - -#.MMX -#.XMM - -#------------------------------------------------------------------------------ -# VOID -# SetCodeSelector ( -# UINT16 Selector -# ); -#------------------------------------------------------------------------------ -ASM_GLOBAL ASM_PFX(SetCodeSelector) -ASM_PFX(SetCodeSelector): - movl 4(%esp), %ecx - subl $0x10, %esp - leal setCodeSelectorLongJump, %eax - movl %eax, (%esp) - movw %cx, 4(%esp) - .byte 0xFF, 0x2C, 0x24 # jmp *(%esp) note:(FWORD jmp) -setCodeSelectorLongJump: - addl $0x10, %esp - ret - -#------------------------------------------------------------------------------ -# VOID -# SetDataSelectors ( -# UINT16 Selector -# ); -#------------------------------------------------------------------------------ -ASM_GLOBAL ASM_PFX(SetDataSelectors) -ASM_PFX(SetDataSelectors): - movl 4(%esp), %ecx - movw %cx, %ss - movw %cx, %ds - movw %cx, %es - movw %cx, %fs - movw %cx, %gs - ret - -#END - diff --git a/UefiCpuPkg/CpuDxe/Ia32/CpuAsm.asm b/UefiCpuPkg/CpuDxe/Ia32/CpuAsm.asm deleted file mode 100644 index 7f8f0d6..0000000 --- a/UefiCpuPkg/CpuDxe/Ia32/CpuAsm.asm +++ /dev/null @@ -1,58 +0,0 @@ - TITLE CpuAsm.asm: -;------------------------------------------------------------------------------ -;* -;* Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR> -;* This program and the accompanying materials -;* are licensed and made available under the terms and conditions of the BSD License -;* which accompanies this distribution. The full text of the license may be found at -;* http://opensource.org/licenses/bsd-license.php -;* -;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -;* -;* CpuAsm.asm -;* -;* Abstract: -;* -;------------------------------------------------------------------------------ - - .686 - .model flat,C - .code - -;------------------------------------------------------------------------------ -; VOID -; SetCodeSelector ( -; UINT16 Selector -; ); -;------------------------------------------------------------------------------ -SetCodeSelector PROC PUBLIC - mov ecx, [esp+4] - sub esp, 0x10 - lea eax, setCodeSelectorLongJump - mov [esp], eax - mov [esp+4], cx - jmp fword ptr [esp] -setCodeSelectorLongJump: - add esp, 0x10 - ret -SetCodeSelector ENDP - -;------------------------------------------------------------------------------ -; VOID -; SetDataSelectors ( -; UINT16 Selector -; ); -;------------------------------------------------------------------------------ -SetDataSelectors PROC PUBLIC - mov ecx, [esp+4] - mov ss, cx - mov ds, cx - mov es, cx - mov fs, cx - mov gs, cx - ret -SetDataSelectors ENDP - - -END diff --git a/UefiCpuPkg/CpuDxe/X64/CpuAsm.S b/UefiCpuPkg/CpuDxe/X64/CpuAsm.S deleted file mode 100644 index e82cadf..0000000 --- a/UefiCpuPkg/CpuDxe/X64/CpuAsm.S +++ /dev/null @@ -1,60 +0,0 @@ -# TITLE CpuAsm.S: - -#------------------------------------------------------------------------------ -#* -#* Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR> -#* This program and the accompanying materials -#* are licensed and made available under the terms and conditions of the BSD License -#* which accompanies this distribution. The full text of the license may be found at -#* http://opensource.org/licenses/bsd-license.php -#* -#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -#* -#* CpuAsm.S -#* -#* Abstract: -#* -#------------------------------------------------------------------------------ - - -#text SEGMENT - - -#------------------------------------------------------------------------------ -# VOID -# SetCodeSelector ( -# UINT16 Selector -# ); -#------------------------------------------------------------------------------ -ASM_GLOBAL ASM_PFX(SetCodeSelector) -ASM_PFX(SetCodeSelector): - subq $0x10, %rsp - leaq L_setCodeSelectorLongJump(%rip), %rax - movq %rax, (%rsp) - movw %cx, 4(%rsp) - .byte 0xFF, 0x2C, 0x24 # jmp (%rsp) note:fword jmp -L_setCodeSelectorLongJump: - addq $0x10, %rsp - ret - -#------------------------------------------------------------------------------ -# VOID -# SetDataSelectors ( -# UINT16 Selector -# ); -#------------------------------------------------------------------------------ -ASM_GLOBAL ASM_PFX(SetDataSelectors) -ASM_PFX(SetDataSelectors): - movw %cx, %ss - movw %cx, %ds - movw %cx, %es - movw %cx, %fs - movw %cx, %gs - ret - -#text ENDS - -#END - - diff --git a/UefiCpuPkg/CpuDxe/X64/CpuAsm.asm b/UefiCpuPkg/CpuDxe/X64/CpuAsm.asm deleted file mode 100644 index c71b06a..0000000 --- a/UefiCpuPkg/CpuDxe/X64/CpuAsm.asm +++ /dev/null @@ -1,54 +0,0 @@ - TITLE CpuAsm.asm: -;------------------------------------------------------------------------------ -;* -;* Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR> -;* This program and the accompanying materials -;* are licensed and made available under the terms and conditions of the BSD License -;* which accompanies this distribution. The full text of the license may be found at -;* http://opensource.org/licenses/bsd-license.php -;* -;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -;* -;* CpuAsm.asm -;* -;* Abstract: -;* -;------------------------------------------------------------------------------ - - .code - -;------------------------------------------------------------------------------ -; VOID -; SetCodeSelector ( -; UINT16 Selector -; ); -;------------------------------------------------------------------------------ -SetCodeSelector PROC PUBLIC - sub rsp, 0x10 - lea rax, setCodeSelectorLongJump - mov [rsp], rax - mov [rsp+4], cx - jmp fword ptr [rsp] -setCodeSelectorLongJump: - add rsp, 0x10 - ret -SetCodeSelector ENDP - -;------------------------------------------------------------------------------ -; VOID -; SetDataSelectors ( -; UINT16 Selector -; ); -;------------------------------------------------------------------------------ -SetDataSelectors PROC PUBLIC - mov ss, cx - mov ds, cx - mov es, cx - mov fs, cx - mov gs, cx - ret -SetDataSelectors ENDP - -END - diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf b/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf index ce5d3aa..6829005 100644 --- a/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf +++ b/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf @@ -30,12 +30,10 @@ # [Sources.IA32] - Ia32/InitializeFpu.asm Ia32/InitializeFpu.nasm Ia32/InitializeFpu.S [Sources.X64] - X64/InitializeFpu.asm X64/InitializeFpu.nasm X64/InitializeFpu.S diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.asm b/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.asm deleted file mode 100644 index 3c31da9..0000000 --- a/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.asm +++ /dev/null @@ -1,79 +0,0 @@ -;------------------------------------------------------------------------------ -;* -;* Copyright (c) 2009, Intel Corporation. All rights reserved.<BR> -;* This program and the accompanying materials -;* are licensed and made available under the terms and conditions of the BSD License -;* which accompanies this distribution. The full text of the license may be found at -;* http://opensource.org/licenses/bsd-license.php -;* -;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -;* -;* -;------------------------------------------------------------------------------ - - - .686 - .model flat,C - .const -; -; Float control word initial value: -; all exceptions masked, double-precision, round-to-nearest -; -mFpuControlWord DW 027Fh -; -; Multimedia-extensions control word: -; all exceptions masked, round-to-nearest, flush to zero for masked underflow -; -mMmxControlWord DD 01F80h - - .xmm - .code - -; -; Initializes floating point units for requirement of UEFI specification. -; -; This function initializes floating-point control word to 0x027F (all exceptions -; masked,double-precision, round-to-nearest) and multimedia-extensions control word -; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero -; for masked underflow). -; -InitializeFloatingPointUnits PROC PUBLIC - - push ebx - - ; - ; Initialize floating point units - ; - finit - fldcw mFpuControlWord - - ; - ; Use CpuId instructuion (CPUID.01H:EDX.SSE[bit 25] = 1) to test - ; whether the processor supports SSE instruction. - ; - mov eax, 1 - cpuid - bt edx, 25 - jnc Done - - ; - ; Set OSFXSR bit 9 in CR4 - ; - mov eax, cr4 - or eax, BIT9 - mov cr4, eax - - ; - ; The processor should support SSE instruction and we can use - ; ldmxcsr instruction - ; - ldmxcsr mMmxControlWord -Done: - pop ebx - - ret - -InitializeFloatingPointUnits ENDP - -END diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm b/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm deleted file mode 100644 index 331af15..0000000 --- a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm +++ /dev/null @@ -1,62 +0,0 @@ -;------------------------------------------------------------------------------ -;* -;* Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR> -;* This program and the accompanying materials -;* are licensed and made available under the terms and conditions of the BSD License -;* which accompanies this distribution. The full text of the license may be found at -;* http://opensource.org/licenses/bsd-license.php -;* -;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -;* -;* -;------------------------------------------------------------------------------ - - -.const -; -; Float control word initial value: -; all exceptions masked, double-extended-precision, round-to-nearest -; -mFpuControlWord DW 037Fh -; -; Multimedia-extensions control word: -; all exceptions masked, round-to-nearest, flush to zero for masked underflow -; -mMmxControlWord DD 01F80h - -.code - - -; -; Initializes floating point units for requirement of UEFI specification. -; -; This function initializes floating-point control word to 0x027F (all exceptions -; masked,double-precision, round-to-nearest) and multimedia-extensions control word -; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero -; for masked underflow). -; -InitializeFloatingPointUnits PROC PUBLIC - - ; - ; Initialize floating point units - ; - ; The following opcodes stand for instruction 'finit' - ; to be supported by some 64-bit assemblers - ; - DB 9Bh, 0DBh, 0E3h - fldcw mFpuControlWord - - ; - ; Set OSFXSR bit 9 in CR4 - ; - mov rax, cr4 - or rax, BIT9 - mov cr4, rax - - ldmxcsr mMmxControlWord - - ret -InitializeFloatingPointUnits ENDP - -END diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf index 58e55a8..50f4aa8 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf @@ -28,7 +28,6 @@ # [Sources.Ia32] - Ia32/ExceptionHandlerAsm.asm Ia32/ExceptionHandlerAsm.nasm Ia32/ExceptionTssEntryAsm.nasm Ia32/ExceptionHandlerAsm.S @@ -36,7 +35,6 @@ Ia32/ArchInterruptDefs.h [Sources.X64] - X64/ExceptionHandlerAsm.asm X64/ExceptionHandlerAsm.nasm X64/ExceptionHandlerAsm.S X64/ArchExceptionHandler.c diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.asm b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.asm deleted file mode 100644 index 126680e..0000000 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.asm +++ /dev/null @@ -1,467 +0,0 @@ -;------------------------------------------------------------------------------ ; -; Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR> -; This program and the accompanying materials -; are licensed and made available under the terms and conditions of the BSD License -; which accompanies this distribution. The full text of the license may be found at -; http://opensource.org/licenses/bsd-license.php. -; -; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -; -; Module Name: -; -; ExceptionHandlerAsm.Asm -; -; Abstract: -; -; IA32 CPU Exception Handler -; -; Notes: -; -;------------------------------------------------------------------------------ - - .686 - .model flat,C - -; -; CommonExceptionHandler() -; -CommonExceptionHandler PROTO C - -.data - -EXTRN mErrorCodeFlag:DWORD ; Error code flags for exceptions -EXTRN mDoFarReturnFlag:DWORD ; Do far return flag - -.code - -ALIGN 8 - -; -; exception handler stub table -; -AsmIdtVectorBegin: -REPEAT 32 - db 6ah ; push #VectorNum - db ($ - AsmIdtVectorBegin) / ((AsmIdtVectorEnd - AsmIdtVectorBegin) / 32) ; VectorNum - push eax - mov eax, CommonInterruptEntry - jmp eax -ENDM -AsmIdtVectorEnd: - -HookAfterStubBegin: - db 6ah ; push -VectorNum: - db 0 ; 0 will be fixed - push eax - mov eax, HookAfterStubHeaderEnd - jmp eax -HookAfterStubHeaderEnd: - pop eax - sub esp, 8 ; reserve room for filling exception data later - push [esp + 8] - xchg ecx, [esp] ; get vector number - bt mErrorCodeFlag, ecx - jnc @F - push [esp] ; addition push if exception data needed -@@: - xchg ecx, [esp] ; restore ecx - push eax - -;----------------------------------------------------------------------------; -; CommonInterruptEntry ; -;----------------------------------------------------------------------------; -; The follow algorithm is used for the common interrupt routine. -; Entry from each interrupt with a push eax and eax=interrupt number -; Stack: -; +---------------------+ -; + EFlags + -; +---------------------+ -; + CS + -; +---------------------+ -; + EIP + -; +---------------------+ -; + Error Code + -; +---------------------+ -; + Vector Number + -; +---------------------+ -; + EBP + -; +---------------------+ <-- EBP -CommonInterruptEntry PROC PUBLIC - cli - pop eax - ; - ; All interrupt handlers are invoked through interrupt gates, so - ; IF flag automatically cleared at the entry point - ; - - ; - ; Get vector number from top of stack - ; - xchg ecx, [esp] - and ecx, 0FFh ; Vector number should be less than 256 - cmp ecx, 32 ; Intel reserved vector for exceptions? - jae NoErrorCode - bt mErrorCodeFlag, ecx - jc HasErrorCode - -NoErrorCode: - - ; - ; Stack: - ; +---------------------+ - ; + EFlags + - ; +---------------------+ - ; + CS + - ; +---------------------+ - ; + EIP + - ; +---------------------+ - ; + ECX + - ; +---------------------+ <-- ESP - ; - ; Registers: - ; ECX - Vector Number - ; - - ; - ; Put Vector Number on stack - ; - push ecx - - ; - ; Put 0 (dummy) error code on stack, and restore ECX - ; - xor ecx, ecx ; ECX = 0 - xchg ecx, [esp+4] - - jmp ErrorCodeAndVectorOnStack - -HasErrorCode: - - ; - ; Stack: - ; +---------------------+ - ; + EFlags + - ; +---------------------+ - ; + CS + - ; +---------------------+ - ; + EIP + - ; +---------------------+ - ; + Error Code + - ; +---------------------+ - ; + ECX + - ; +---------------------+ <-- ESP - ; - ; Registers: - ; ECX - Vector Number - ; - - ; - ; Put Vector Number on stack and restore ECX - ; - xchg ecx, [esp] - -ErrorCodeAndVectorOnStack: - push ebp - mov ebp, esp - - ; - ; Stack: - ; +---------------------+ - ; + EFlags + - ; +---------------------+ - ; + CS + - ; +---------------------+ - ; + EIP + - ; +---------------------+ - ; + Error Code + - ; +---------------------+ - ; + Vector Number + - ; +---------------------+ - ; + EBP + - ; +---------------------+ <-- EBP - ; - - ; - ; Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32 - ; is 16-byte aligned - ; - and esp, 0fffffff0h - sub esp, 12 - - sub esp, 8 - push 0 ; clear EXCEPTION_HANDLER_CONTEXT.OldIdtHandler - push 0 ; clear EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag - -;; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax; - push eax - push ecx - push edx - push ebx - lea ecx, [ebp + 6 * 4] - push ecx ; ESP - push dword ptr [ebp] ; EBP - push esi - push edi - -;; UINT32 Gs, Fs, Es, Ds, Cs, Ss; - mov eax, ss - push eax - movzx eax, word ptr [ebp + 4 * 4] - push eax - mov eax, ds - push eax - mov eax, es - push eax - mov eax, fs - push eax - mov eax, gs - push eax - -;; UINT32 Eip; - mov eax, [ebp + 3 * 4] - push eax - -;; UINT32 Gdtr[2], Idtr[2]; - sub esp, 8 - sidt [esp] - mov eax, [esp + 2] - xchg eax, [esp] - and eax, 0FFFFh - mov [esp+4], eax - - sub esp, 8 - sgdt [esp] - mov eax, [esp + 2] - xchg eax, [esp] - and eax, 0FFFFh - mov [esp+4], eax - -;; UINT32 Ldtr, Tr; - xor eax, eax - str ax - push eax - sldt ax - push eax - -;; UINT32 EFlags; - mov eax, [ebp + 5 * 4] - push eax - -;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4; - mov eax, 1 - push ebx ; temporarily save value of ebx on stack - cpuid ; use CPUID to determine if FXSAVE/FXRESTOR and DE - ; are supported - pop ebx ; retore value of ebx that was overwritten by CPUID - mov eax, cr4 - push eax ; push cr4 firstly - test edx, BIT24 ; Test for FXSAVE/FXRESTOR support - jz @F - or eax, BIT9 ; Set CR4.OSFXSR -@@: - test edx, BIT2 ; Test for Debugging Extensions support - jz @F - or eax, BIT3 ; Set CR4.DE -@@: - mov cr4, eax - mov eax, cr3 - push eax - mov eax, cr2 - push eax - xor eax, eax - push eax - mov eax, cr0 - push eax - -;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7; - mov eax, dr7 - push eax - mov eax, dr6 - push eax - mov eax, dr3 - push eax - mov eax, dr2 - push eax - mov eax, dr1 - push eax - mov eax, dr0 - push eax - -;; FX_SAVE_STATE_IA32 FxSaveState; - sub esp, 512 - mov edi, esp - test edx, BIT24 ; Test for FXSAVE/FXRESTOR support. - ; edx still contains result from CPUID above - jz @F - db 0fh, 0aeh, 07h ;fxsave [edi] -@@: - -;; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear - cld - -;; UINT32 ExceptionData; - push dword ptr [ebp + 2 * 4] - -;; Prepare parameter and call - mov edx, esp - push edx - mov edx, dword ptr [ebp + 1 * 4] - push edx - - ; - ; Call External Exception Handler - ; - mov eax, CommonExceptionHandler - call eax - add esp, 8 - - cli -;; UINT32 ExceptionData; - add esp, 4 - -;; FX_SAVE_STATE_IA32 FxSaveState; - mov esi, esp - mov eax, 1 - cpuid ; use CPUID to determine if FXSAVE/FXRESTOR - ; are supported - test edx, BIT24 ; Test for FXSAVE/FXRESTOR support - jz @F - db 0fh, 0aeh, 0eh ; fxrstor [esi] -@@: - add esp, 512 - -;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7; -;; Skip restoration of DRx registers to support in-circuit emualators -;; or debuggers set breakpoint in interrupt/exception context - add esp, 4 * 6 - -;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4; - pop eax - mov cr0, eax - add esp, 4 ; not for Cr1 - pop eax - mov cr2, eax - pop eax - mov cr3, eax - pop eax - mov cr4, eax - -;; UINT32 EFlags; - pop dword ptr [ebp + 5 * 4] - -;; UINT32 Ldtr, Tr; -;; UINT32 Gdtr[2], Idtr[2]; -;; Best not let anyone mess with these particular registers... - add esp, 24 - -;; UINT32 Eip; - pop dword ptr [ebp + 3 * 4] - -;; UINT32 Gs, Fs, Es, Ds, Cs, Ss; -;; NOTE - modified segment registers could hang the debugger... We -;; could attempt to insulate ourselves against this possibility, -;; but that poses risks as well. -;; - pop gs - pop fs - pop es - pop ds - pop dword ptr [ebp + 4 * 4] - pop ss - -;; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax; - pop edi - pop esi - add esp, 4 ; not for ebp - add esp, 4 ; not for esp - pop ebx - pop edx - pop ecx - pop eax - - pop dword ptr [ebp - 8] - pop dword ptr [ebp - 4] - mov esp, ebp - pop ebp - add esp, 8 - cmp dword ptr [esp - 16], 0 ; check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler - jz DoReturn - cmp dword ptr [esp - 20], 1 ; check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag - jz ErrorCode - jmp dword ptr [esp - 16] -ErrorCode: - sub esp, 4 - jmp dword ptr [esp - 12] - -DoReturn: - cmp mDoFarReturnFlag, 0 ; Check if need to do far return instead of IRET - jz DoIret - push [esp + 8] ; save EFLAGS - add esp, 16 - push [esp - 8] ; save CS in new location - push [esp - 8] ; save EIP in new location - push [esp - 8] ; save EFLAGS in new location - popfd ; restore EFLAGS - retf ; far return - -DoIret: - iretd - -CommonInterruptEntry ENDP - -;---------------------------------------; -; _AsmGetTemplateAddressMap ; -;----------------------------------------------------------------------------; -; -; Protocol prototype -; AsmGetTemplateAddressMap ( -; EXCEPTION_HANDLER_TEMPLATE_MAP *AddressMap -; ); -; -; Routine Description: -; -; Return address map of interrupt handler template so that C code can generate -; interrupt table. -; -; Arguments: -; -; -; Returns: -; -; Nothing -; -; -; Input: [ebp][0] = Original ebp -; [ebp][4] = Return address -; -; Output: Nothing -; -; Destroys: Nothing -;-----------------------------------------------------------------------------; -AsmGetTemplateAddressMap proc near public - push ebp ; C prolog - mov ebp, esp - pushad - - mov ebx, dword ptr [ebp + 08h] - mov dword ptr [ebx], AsmIdtVectorBegin - mov dword ptr [ebx + 4h], (AsmIdtVectorEnd - AsmIdtVectorBegin) / 32 - mov dword ptr [ebx + 8h], HookAfterStubBegin - - popad - pop ebp - ret -AsmGetTemplateAddressMap ENDP - -;------------------------------------------------------------------------------------- -; AsmVectorNumFixup (*NewVectorAddr, VectorNum, *OldVectorAddr); -;------------------------------------------------------------------------------------- -AsmVectorNumFixup proc near public - mov eax, dword ptr [esp + 8] - mov ecx, [esp + 4] - mov [ecx + (VectorNum - HookAfterStubBegin)], al - ret -AsmVectorNumFixup ENDP -END diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf index 4c0d435..3288dbe 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf @@ -28,7 +28,6 @@ # [Sources.Ia32] - Ia32/ExceptionHandlerAsm.asm Ia32/ExceptionHandlerAsm.nasm Ia32/ExceptionTssEntryAsm.nasm Ia32/ExceptionHandlerAsm.S @@ -36,7 +35,6 @@ Ia32/ArchInterruptDefs.h [Sources.X64] - X64/ExceptionHandlerAsm.asm X64/ExceptionHandlerAsm.nasm X64/ExceptionHandlerAsm.S X64/ArchExceptionHandler.c diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf index e5c03c1..a433b74 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf @@ -28,7 +28,6 @@ # [Sources.Ia32] - Ia32/ExceptionHandlerAsm.asm Ia32/ExceptionHandlerAsm.nasm Ia32/ExceptionTssEntryAsm.nasm Ia32/ExceptionHandlerAsm.S @@ -36,7 +35,6 @@ Ia32/ArchInterruptDefs.h [Sources.X64] - X64/ExceptionHandlerAsm.asm X64/ExceptionHandlerAsm.nasm X64/ExceptionHandlerAsm.S X64/ArchExceptionHandler.c diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf index 56b875b..725d71b 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf @@ -28,7 +28,6 @@ # [Sources.Ia32] - Ia32/ExceptionHandlerAsm.asm Ia32/ExceptionHandlerAsm.nasm Ia32/ExceptionTssEntryAsm.nasm Ia32/ExceptionHandlerAsm.S @@ -36,7 +35,6 @@ Ia32/ArchInterruptDefs.h [Sources.X64] - X64/ExceptionHandlerAsm.asm X64/ExceptionHandlerAsm.nasm X64/ExceptionHandlerAsm.S X64/ArchExceptionHandler.c diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.asm b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.asm deleted file mode 100644 index 726c64a..0000000 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.asm +++ /dev/null @@ -1,389 +0,0 @@ -;------------------------------------------------------------------------------ ; -; Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved.<BR> -; This program and the accompanying materials -; are licensed and made available under the terms and conditions of the BSD License -; which accompanies this distribution. The full text of the license may be found at -; http://opensource.org/licenses/bsd-license.php. -; -; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -; -; Module Name: -; -; ExceptionHandlerAsm.Asm -; -; Abstract: -; -; x64 CPU Exception Handler -; -; Notes: -; -;------------------------------------------------------------------------------ - -; -; CommonExceptionHandler() -; -externdef CommonExceptionHandler:near - -EXTRN mErrorCodeFlag:DWORD ; Error code flags for exceptions -EXTRN mDoFarReturnFlag:QWORD ; Do far return flag - -data SEGMENT - -.code - -ALIGN 8 - -AsmIdtVectorBegin: -REPEAT 32 - db 6ah ; push #VectorNum - db ($ - AsmIdtVectorBegin) / ((AsmIdtVectorEnd - AsmIdtVectorBegin) / 32) ; VectorNum - push rax - mov rax, CommonInterruptEntry - jmp rax -ENDM -AsmIdtVectorEnd: - -HookAfterStubHeaderBegin: - db 6ah ; push -@VectorNum: - db 0 ; 0 will be fixed - push rax - mov rax, HookAfterStubHeaderEnd - jmp rax -HookAfterStubHeaderEnd: - mov rax, rsp - and sp, 0fff0h ; make sure 16-byte aligned for exception context - sub rsp, 18h ; reserve room for filling exception data later - push rcx - mov rcx, [rax + 8] - bt mErrorCodeFlag, ecx - jnc @F - push [rsp] ; push additional rcx to make stack alignment -@@: - xchg rcx, [rsp] ; restore rcx, save Exception Number in stack - push [rax] ; push rax into stack to keep code consistence - -;---------------------------------------; -; CommonInterruptEntry ; -;---------------------------------------; -; The follow algorithm is used for the common interrupt routine. -; Entry from each interrupt with a push eax and eax=interrupt number -; Stack frame would be as follows as specified in IA32 manuals: -; -; +---------------------+ <-- 16-byte aligned ensured by processor -; + Old SS + -; +---------------------+ -; + Old RSP + -; +---------------------+ -; + RFlags + -; +---------------------+ -; + CS + -; +---------------------+ -; + RIP + -; +---------------------+ -; + Error Code + -; +---------------------+ -; + Vector Number + -; +---------------------+ -; + RBP + -; +---------------------+ <-- RBP, 16-byte aligned -; The follow algorithm is used for the common interrupt routine. -CommonInterruptEntry PROC PUBLIC - cli - pop rax - ; - ; All interrupt handlers are invoked through interrupt gates, so - ; IF flag automatically cleared at the entry point - ; - xchg rcx, [rsp] ; Save rcx into stack and save vector number into rcx - and rcx, 0FFh - cmp ecx, 32 ; Intel reserved vector for exceptions? - jae NoErrorCode - bt mErrorCodeFlag, ecx - jc @F - -NoErrorCode: - - ; - ; Push a dummy error code on the stack - ; to maintain coherent stack map - ; - push [rsp] - mov qword ptr [rsp + 8], 0 -@@: - push rbp - mov rbp, rsp - push 0 ; clear EXCEPTION_HANDLER_CONTEXT.OldIdtHandler - push 0 ; clear EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag - - ; - ; Stack: - ; +---------------------+ <-- 16-byte aligned ensured by processor - ; + Old SS + - ; +---------------------+ - ; + Old RSP + - ; +---------------------+ - ; + RFlags + - ; +---------------------+ - ; + CS + - ; +---------------------+ - ; + RIP + - ; +---------------------+ - ; + Error Code + - ; +---------------------+ - ; + RCX / Vector Number + - ; +---------------------+ - ; + RBP + - ; +---------------------+ <-- RBP, 16-byte aligned - ; - - - ; - ; Since here the stack pointer is 16-byte aligned, so - ; EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64 - ; is 16-byte aligned - ; - -;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax; -;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15; - push r15 - push r14 - push r13 - push r12 - push r11 - push r10 - push r9 - push r8 - push rax - push qword ptr [rbp + 8] ; RCX - push rdx - push rbx - push qword ptr [rbp + 48] ; RSP - push qword ptr [rbp] ; RBP - push rsi - push rdi - -;; UINT64 Gs, Fs, Es, Ds, Cs, Ss; insure high 16 bits of each is zero - movzx rax, word ptr [rbp + 56] - push rax ; for ss - movzx rax, word ptr [rbp + 32] - push rax ; for cs - mov rax, ds - push rax - mov rax, es - push rax - mov rax, fs - push rax - mov rax, gs - push rax - - mov [rbp + 8], rcx ; save vector number - -;; UINT64 Rip; - push qword ptr [rbp + 24] - -;; UINT64 Gdtr[2], Idtr[2]; - xor rax, rax - push rax - push rax - sidt [rsp] - xchg rax, [rsp + 2] - xchg rax, [rsp] - xchg rax, [rsp + 8] - - xor rax, rax - push rax - push rax - sgdt [rsp] - xchg rax, [rsp + 2] - xchg rax, [rsp] - xchg rax, [rsp + 8] - -;; UINT64 Ldtr, Tr; - xor rax, rax - str ax - push rax - sldt ax - push rax - -;; UINT64 RFlags; - push qword ptr [rbp + 40] - -;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8; - mov rax, cr8 - push rax - mov rax, cr4 - or rax, 208h - mov cr4, rax - push rax - mov rax, cr3 - push rax - mov rax, cr2 - push rax - xor rax, rax - push rax - mov rax, cr0 - push rax - -;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7; - mov rax, dr7 - push rax - mov rax, dr6 - push rax - mov rax, dr3 - push rax - mov rax, dr2 - push rax - mov rax, dr1 - push rax - mov rax, dr0 - push rax - -;; FX_SAVE_STATE_X64 FxSaveState; - sub rsp, 512 - mov rdi, rsp - db 0fh, 0aeh, 07h ;fxsave [rdi] - -;; UEFI calling convention for x64 requires that Direction flag in EFLAGs is clear - cld - -;; UINT32 ExceptionData; - push qword ptr [rbp + 16] - -;; Prepare parameter and call - mov rcx, [rbp + 8] - mov rdx, rsp - ; - ; Per X64 calling convention, allocate maximum parameter stack space - ; and make sure RSP is 16-byte aligned - ; - sub rsp, 4 * 8 + 8 - mov rax, CommonExceptionHandler - call rax - add rsp, 4 * 8 + 8 - - cli -;; UINT64 ExceptionData; - add rsp, 8 - -;; FX_SAVE_STATE_X64 FxSaveState; - - mov rsi, rsp - db 0fh, 0aeh, 0Eh ; fxrstor [rsi] - add rsp, 512 - -;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7; -;; Skip restoration of DRx registers to support in-circuit emualators -;; or debuggers set breakpoint in interrupt/exception context - add rsp, 8 * 6 - -;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8; - pop rax - mov cr0, rax - add rsp, 8 ; not for Cr1 - pop rax - mov cr2, rax - pop rax - mov cr3, rax - pop rax - mov cr4, rax - pop rax - mov cr8, rax - -;; UINT64 RFlags; - pop qword ptr [rbp + 40] - -;; UINT64 Ldtr, Tr; -;; UINT64 Gdtr[2], Idtr[2]; -;; Best not let anyone mess with these particular registers... - add rsp, 48 - -;; UINT64 Rip; - pop qword ptr [rbp + 24] - -;; UINT64 Gs, Fs, Es, Ds, Cs, Ss; - pop rax - ; mov gs, rax ; not for gs - pop rax - ; mov fs, rax ; not for fs - ; (X64 will not use fs and gs, so we do not restore it) - pop rax - mov es, rax - pop rax - mov ds, rax - pop qword ptr [rbp + 32] ; for cs - pop qword ptr [rbp + 56] ; for ss - -;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax; -;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15; - pop rdi - pop rsi - add rsp, 8 ; not for rbp - pop qword ptr [rbp + 48] ; for rsp - pop rbx - pop rdx - pop rcx - pop rax - pop r8 - pop r9 - pop r10 - pop r11 - pop r12 - pop r13 - pop r14 - pop r15 - - mov rsp, rbp - pop rbp - add rsp, 16 - cmp qword ptr [rsp - 32], 0 ; check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler - jz DoReturn - cmp qword ptr [rsp - 40], 1 ; check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag - jz ErrorCode - jmp qword ptr [rsp - 32] -ErrorCode: - sub rsp, 8 - jmp qword ptr [rsp - 24] - -DoReturn: - cmp mDoFarReturnFlag, 0 ; Check if need to do far return instead of IRET - jz DoIret - push rax - mov rax, rsp ; save old RSP to rax - mov rsp, [rsp + 20h] - push [rax + 10h] ; save CS in new location - push [rax + 8h] ; save EIP in new location - push [rax + 18h] ; save EFLAGS in new location - mov rax, [rax] ; restore rax - popfq ; restore EFLAGS - DB 48h ; prefix to composite "retq" with next "retf" - retf ; far return -DoIret: - iretq - -CommonInterruptEntry ENDP - -;------------------------------------------------------------------------------------- -; GetTemplateAddressMap (&AddressMap); -;------------------------------------------------------------------------------------- -; comments here for definition of address map -AsmGetTemplateAddressMap PROC - mov rax, offset AsmIdtVectorBegin - mov qword ptr [rcx], rax - mov qword ptr [rcx + 8h], (AsmIdtVectorEnd - AsmIdtVectorBegin) / 32 - mov rax, offset HookAfterStubHeaderBegin - mov qword ptr [rcx + 10h], rax - ret -AsmGetTemplateAddressMap ENDP - -;------------------------------------------------------------------------------------- -; AsmVectorNumFixup (*NewVectorAddr, VectorNum, *OldVectorAddr); -;------------------------------------------------------------------------------------- -AsmVectorNumFixup PROC - mov rax, rdx - mov [rcx + (@VectorNum - HookAfterStubHeaderBegin)], al - ret -AsmVectorNumFixup ENDP - -END diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.asm b/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.asm deleted file mode 100644 index 91dc1eb..0000000 --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.asm +++ /dev/null @@ -1,285 +0,0 @@ -;------------------------------------------------------------------------------ ; -; Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR> -; This program and the accompanying materials -; are licensed and made available under the terms and conditions of the BSD License -; which accompanies this distribution. The full text of the license may be found at -; http://opensource.org/licenses/bsd-license.php. -; -; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -; -; Module Name: -; -; SmiEntry.asm -; -; Abstract: -; -; Code template of the SMI handler for a particular processor -; -;------------------------------------------------------------------------------- - - .686p - .model flat,C - .xmm - -MSR_IA32_MISC_ENABLE EQU 1A0h -MSR_EFER EQU 0c0000080h -MSR_EFER_XD EQU 0800h - -; -; Constants relating to TXT_PROCESSOR_SMM_DESCRIPTOR -; -DSC_OFFSET EQU 0fb00h -DSC_GDTPTR EQU 48h -DSC_GDTSIZ EQU 50h -DSC_CS EQU 14h -DSC_DS EQU 16h -DSC_SS EQU 18h -DSC_OTHERSEG EQU 1Ah - -PROTECT_MODE_CS EQU 08h -PROTECT_MODE_DS EQU 20h -TSS_SEGMENT EQU 40h - -SmiRendezvous PROTO C -CpuSmmDebugEntry PROTO C -CpuSmmDebugExit PROTO C - -EXTERNDEF gcStmSmiHandlerTemplate:BYTE -EXTERNDEF gcStmSmiHandlerSize:WORD -EXTERNDEF gcStmSmiHandlerOffset:WORD -EXTERNDEF gStmSmiCr3:DWORD -EXTERNDEF gStmSmiStack:DWORD -EXTERNDEF gStmSmbase:DWORD -EXTERNDEF gStmXdSupported:BYTE -EXTERNDEF FeaturePcdGet (PcdCpuSmmStackGuard):BYTE -EXTERNDEF gStmSmiHandlerIdtr:FWORD - - .code - -gcStmSmiHandlerTemplate LABEL BYTE - -_StmSmiEntryPoint: - DB 0bbh ; mov bx, imm16 - DW offset _StmGdtDesc - _StmSmiEntryPoint + 8000h - DB 2eh, 0a1h ; mov ax, cs:[offset16] - DW DSC_OFFSET + DSC_GDTSIZ - dec eax - mov cs:[edi], eax ; mov cs:[bx], ax - DB 66h, 2eh, 0a1h ; mov eax, cs:[offset16] - DW DSC_OFFSET + DSC_GDTPTR - mov cs:[edi + 2], ax ; mov cs:[bx + 2], eax - mov bp, ax ; ebp = GDT base - DB 66h - lgdt fword ptr cs:[edi] ; lgdt fword ptr cs:[bx] -; Patch ProtectedMode Segment - DB 0b8h ; mov ax, imm16 - DW PROTECT_MODE_CS ; set AX for segment directly - mov cs:[edi - 2], eax ; mov cs:[bx - 2], ax -; Patch ProtectedMode entry - DB 66h, 0bfh ; mov edi, SMBASE -gStmSmbase DD ? - DB 67h - lea ax, [edi + (@32bit - _StmSmiEntryPoint) + 8000h] - mov cs:[edi - 6], ax ; mov cs:[bx - 6], eax - mov ebx, cr0 - DB 66h - and ebx, 9ffafff3h - DB 66h - or ebx, 23h - mov cr0, ebx - DB 66h, 0eah - DD ? - DW ? -_StmGdtDesc FWORD ? - -@32bit: - mov ax, PROTECT_MODE_DS - mov ds, ax - mov es, ax - mov fs, ax - mov gs, ax - mov ss, ax - DB 0bch ; mov esp, imm32 -gStmSmiStack DD ? - mov eax, offset gStmSmiHandlerIdtr - lidt fword ptr [eax] - jmp ProtFlatMode - -ProtFlatMode: - DB 0b8h ; mov eax, imm32 -gStmSmiCr3 DD ? - mov cr3, eax -; -; Need to test for CR4 specific bit support -; - mov eax, 1 - cpuid ; use CPUID to determine if specific CR4 bits are supported - xor eax, eax ; Clear EAX - test edx, BIT2 ; Check for DE capabilities - jz @f - or eax, BIT3 -@@: - test edx, BIT6 ; Check for PAE capabilities - jz @f - or eax, BIT5 -@@: - test edx, BIT7 ; Check for MCE capabilities - jz @f - or eax, BIT6 -@@: - test edx, BIT24 ; Check for FXSR capabilities - jz @f - or eax, BIT9 -@@: - test edx, BIT25 ; Check for SSE capabilities - jz @f - or eax, BIT10 -@@: ; as cr4.PGE is not set here, refresh cr3 - mov cr4, eax ; in PreModifyMtrrs() to flush TLB. - - cmp FeaturePcdGet (PcdCpuSmmStackGuard), 0 - jz @F -; Load TSS - mov byte ptr [ebp + TSS_SEGMENT + 5], 89h ; clear busy flag - mov eax, TSS_SEGMENT - ltr ax -@@: - -; enable NXE if supported - DB 0b0h ; mov al, imm8 -gStmXdSupported DB 1 - cmp al, 0 - jz @SkipXd -; -; Check XD disable bit -; - mov ecx, MSR_IA32_MISC_ENABLE - rdmsr - push edx ; save MSR_IA32_MISC_ENABLE[63-32] - test edx, BIT2 ; MSR_IA32_MISC_ENABLE[34] - jz @f - and dx, 0FFFBh ; clear XD Disable bit if it is set - wrmsr -@@: - mov ecx, MSR_EFER - rdmsr - or ax, MSR_EFER_XD ; enable NXE - wrmsr - jmp @XdDone -@SkipXd: - sub esp, 4 -@XdDone: - - mov ebx, cr0 - or ebx, 080010023h ; enable paging + WP + NE + MP + PE - mov cr0, ebx - lea ebx, [edi + DSC_OFFSET] - mov ax, [ebx + DSC_DS] - mov ds, eax - mov ax, [ebx + DSC_OTHERSEG] - mov es, eax - mov fs, eax - mov gs, eax - mov ax, [ebx + DSC_SS] - mov ss, eax - -CommonHandler: - mov ebx, [esp + 4] ; CPU Index - push ebx - mov eax, CpuSmmDebugEntry - call eax - add esp, 4 - - push ebx - mov eax, SmiRendezvous - call eax - add esp, 4 - - push ebx - mov eax, CpuSmmDebugExit - call eax - add esp, 4 - - mov eax, offset gStmXdSupported - mov al, [eax] - cmp al, 0 - jz @f - pop edx ; get saved MSR_IA32_MISC_ENABLE[63-32] - test edx, BIT2 - jz @f - mov ecx, MSR_IA32_MISC_ENABLE - rdmsr - or dx, BIT2 ; set XD Disable bit if it was set before entering into SMM - wrmsr - -@@: - rsm - -_StmSmiHandler: -; -; Check XD disable bit -; - xor esi, esi - mov eax, offset gStmXdSupported - mov al, [eax] - cmp al, 0 - jz @StmXdDone - mov ecx, MSR_IA32_MISC_ENABLE - rdmsr - mov esi, edx ; save MSR_IA32_MISC_ENABLE[63-32] - test edx, BIT2 ; MSR_IA32_MISC_ENABLE[34] - jz @f - and dx, 0FFFBh ; clear XD Disable bit if it is set - wrmsr -@@: - mov ecx, MSR_EFER - rdmsr - or ax, MSR_EFER_XD ; enable NXE - wrmsr -@StmXdDone: - push esi - - ; below step is needed, because STM does not run above code. - ; we have to run below code to set IDT/CR0/CR4 - mov eax, offset gStmSmiHandlerIdtr - lidt fword ptr [eax] - - - mov eax, cr0 - or eax, 80010023h ; enable paging + WP + NE + MP + PE - mov cr0, eax -; -; Need to test for CR4 specific bit support -; - mov eax, 1 - cpuid ; use CPUID to determine if specific CR4 bits are supported - mov eax, cr4 ; init EAX - test edx, BIT2 ; Check for DE capabilities - jz @f - or eax, BIT3 -@@: - test edx, BIT6 ; Check for PAE capabilities - jz @f - or eax, BIT5 -@@: - test edx, BIT7 ; Check for MCE capabilities - jz @f - or eax, BIT6 -@@: - test edx, BIT24 ; Check for FXSR capabilities - jz @f - or eax, BIT9 -@@: - test edx, BIT25 ; Check for SSE capabilities - jz @f - or eax, BIT10 -@@: ; as cr4.PGE is not set here, refresh cr3 - mov cr4, eax ; in PreModifyMtrrs() to flush TLB. - ; STM init finish - jmp CommonHandler - -gcStmSmiHandlerSize DW $ - _StmSmiEntryPoint -gcStmSmiHandlerOffset DW _StmSmiHandler - _StmSmiEntryPoint - - END diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiException.asm b/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiException.asm deleted file mode 100644 index d0ae147..0000000 --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiException.asm +++ /dev/null @@ -1,175 +0,0 @@ -;------------------------------------------------------------------------------ ; -; Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR> -; This program and the accompanying materials -; are licensed and made available under the terms and conditions of the BSD License -; which accompanies this distribution. The full text of the license may be found at -; http://opensource.org/licenses/bsd-license.php. -; -; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -; -; Module Name: -; -; SmiException.asm -; -; Abstract: -; -; Exception handlers used in SM mode -; -;------------------------------------------------------------------------------- - - .686p - .model flat,C - -EXTERNDEF gcStmPsd:BYTE - -EXTERNDEF SmmStmExceptionHandler:PROC -EXTERNDEF SmmStmSetup:PROC -EXTERNDEF SmmStmTeardown:PROC -EXTERNDEF gStmXdSupported:BYTE - -CODE_SEL = 08h -DATA_SEL = 20h -TSS_SEL = 40h - -MSR_IA32_MISC_ENABLE EQU 1A0h -MSR_EFER EQU 0c0000080h -MSR_EFER_XD EQU 0800h - - .data - -gcStmPsd LABEL BYTE - DB 'TXTPSSIG' - DW PSD_SIZE - DW 1 ; Version - DD 0 ; LocalApicId - DB 05h ; Cr4Pse;Cr4Pae;Intel64Mode;ExecutionDisableOutsideSmrr - DB 0 ; BIOS to STM - DB 0 ; STM to BIOS - DB 0 - DW CODE_SEL - DW DATA_SEL - DW DATA_SEL - DW DATA_SEL - DW TSS_SEL - DW 0 - DQ 0 ; SmmCr3 - DQ _OnStmSetup - DQ _OnStmTeardown - DQ 0 ; SmmSmiHandlerRip - SMM guest entrypoint - DQ 0 ; SmmSmiHandlerRsp - DQ 0 - DD 0 - DD 80010100h ; RequiredStmSmmRevId - DQ _OnException - DQ 0 ; ExceptionStack - DW DATA_SEL - DW 01Fh ; ExceptionFilter - DD 0 - DQ 0 - DQ 0 ; BiosHwResourceRequirementsPtr - DQ 0 ; AcpiRsdp - DB 0 ; PhysicalAddressBits -PSD_SIZE = $ - offset gcStmPsd - - .code -;------------------------------------------------------------------------------ -; SMM Exception handlers -;------------------------------------------------------------------------------ -_OnException PROC - mov ecx, esp - push ecx - call SmmStmExceptionHandler - add esp, 4 - - mov ebx, eax - mov eax, 4 - DB 0fh, 01h, 0c1h ; VMCALL - jmp $ -_OnException ENDP - -_OnStmSetup PROC -; -; Check XD disable bit -; - xor esi, esi - mov eax, offset gStmXdSupported - mov al, [eax] - cmp al, 0 - jz @StmXdDone1 - mov ecx, MSR_IA32_MISC_ENABLE - rdmsr - mov esi, edx ; save MSR_IA32_MISC_ENABLE[63-32] - test edx, BIT2 ; MSR_IA32_MISC_ENABLE[34] - jz @f - and dx, 0FFFBh ; clear XD Disable bit if it is set - wrmsr -@@: - mov ecx, MSR_EFER - rdmsr - or ax, MSR_EFER_XD ; enable NXE - wrmsr -@StmXdDone1: - push esi - - call SmmStmSetup - - mov eax, offset gStmXdSupported - mov al, [eax] - cmp al, 0 - jz @f - pop edx ; get saved MSR_IA32_MISC_ENABLE[63-32] - test edx, BIT2 - jz @f - mov ecx, MSR_IA32_MISC_ENABLE - rdmsr - or dx, BIT2 ; set XD Disable bit if it was set before entering into SMM - wrmsr -@@: - - rsm -_OnStmSetup ENDP - -_OnStmTeardown PROC -; -; Check XD disable bit -; - xor esi, esi - mov eax, offset gStmXdSupported - mov al, [eax] - cmp al, 0 - jz @StmXdDone2 - mov ecx, MSR_IA32_MISC_ENABLE - rdmsr - mov esi, edx ; save MSR_IA32_MISC_ENABLE[63-32] - test edx, BIT2 ; MSR_IA32_MISC_ENABLE[34] - jz @f - and dx, 0FFFBh ; clear XD Disable bit if it is set - wrmsr -@@: - mov ecx, MSR_EFER - rdmsr - or ax, MSR_EFER_XD ; enable NXE - wrmsr -@StmXdDone2: - push esi - - call SmmStmTeardown - - mov eax, offset gStmXdSupported - mov al, [eax] - cmp al, 0 - jz @f - pop edx ; get saved MSR_IA32_MISC_ENABLE[63-32] - test edx, BIT2 - jz @f - mov ecx, MSR_IA32_MISC_ENABLE - rdmsr - or dx, BIT2 ; set XD Disable bit if it was set before entering into SMM - wrmsr -@@: - - rsm -_OnStmTeardown ENDP - - END diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf index db8dcdc..2ec6a24 100644 --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf +++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf @@ -31,8 +31,6 @@ [Sources.Ia32] Ia32/SmmStmSupport.c - Ia32/SmiEntry.asm - Ia32/SmiException.asm Ia32/SmiEntry.nasm Ia32/SmiException.nasm @@ -43,8 +41,6 @@ [Sources.X64] X64/SmmStmSupport.c - X64/SmiEntry.asm - X64/SmiException.asm X64/SmiEntry.nasm X64/SmiException.nasm diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.asm b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.asm deleted file mode 100644 index ad51e07..0000000 --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.asm +++ /dev/null @@ -1,281 +0,0 @@ -;------------------------------------------------------------------------------ ; -; Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR> -; This program and the accompanying materials -; are licensed and made available under the terms and conditions of the BSD License -; which accompanies this distribution. The full text of the license may be found at -; http://opensource.org/licenses/bsd-license.php. -; -; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -; -; Module Name: -; -; SmiEntry.asm -; -; Abstract: -; -; Code template of the SMI handler for a particular processor -; -;------------------------------------------------------------------------------- - -; -; Variables referenced by C code -; -EXTERNDEF SmiRendezvous:PROC -EXTERNDEF CpuSmmDebugEntry:PROC -EXTERNDEF CpuSmmDebugExit:PROC -EXTERNDEF gcStmSmiHandlerTemplate:BYTE -EXTERNDEF gcStmSmiHandlerSize:WORD -EXTERNDEF gcStmSmiHandlerOffset:WORD -EXTERNDEF gStmSmiCr3:DWORD -EXTERNDEF gStmSmiStack:DWORD -EXTERNDEF gStmSmbase:DWORD -EXTERNDEF gStmXdSupported:BYTE -EXTERNDEF gStmSmiHandlerIdtr:FWORD - -MSR_IA32_MISC_ENABLE EQU 1A0h -MSR_EFER EQU 0c0000080h -MSR_EFER_XD EQU 0800h - -; -; Constants relating to TXT_PROCESSOR_SMM_DESCRIPTOR -; -DSC_OFFSET EQU 0fb00h -DSC_GDTPTR EQU 48h -DSC_GDTSIZ EQU 50h -DSC_CS EQU 14h -DSC_DS EQU 16h -DSC_SS EQU 18h -DSC_OTHERSEG EQU 1ah -; -; Constants relating to CPU State Save Area -; -SSM_DR6 EQU 0ffd0h -SSM_DR7 EQU 0ffc8h - -PROTECT_MODE_CS EQU 08h -PROTECT_MODE_DS EQU 20h -LONG_MODE_CS EQU 38h -TSS_SEGMENT EQU 40h -GDT_SIZE EQU 50h - - .code - -gcStmSmiHandlerTemplate LABEL BYTE - -_StmSmiEntryPoint: - ; - ; The encoding of BX in 16-bit addressing mode is the same as of RDI in 64- - ; bit addressing mode. And that coincidence has been used in the following - ; "64-bit like" 16-bit code. Be aware that once RDI is referenced as a - ; base address register, it is actually BX that is referenced. - ; - DB 0bbh ; mov bx, imm16 - DW offset _StmGdtDesc - _StmSmiEntryPoint + 8000h ; bx = GdtDesc offset -; fix GDT descriptor - DB 2eh, 0a1h ; mov ax, cs:[offset16] - DW DSC_OFFSET + DSC_GDTSIZ - DB 48h ; dec ax - DB 2eh - mov [rdi], eax ; mov cs:[bx], ax - DB 66h, 2eh, 0a1h ; mov eax, cs:[offset16] - DW DSC_OFFSET + DSC_GDTPTR - DB 2eh - mov [rdi + 2], ax ; mov cs:[bx + 2], eax - DB 66h, 2eh - lgdt fword ptr [rdi] ; lgdt fword ptr cs:[bx] -; Patch ProtectedMode Segment - DB 0b8h ; mov ax, imm16 - DW PROTECT_MODE_CS ; set AX for segment directly - DB 2eh - mov [rdi - 2], eax ; mov cs:[bx - 2], ax -; Patch ProtectedMode entry - DB 66h, 0bfh ; mov edi, SMBASE -gStmSmbase DD ? - lea ax, [edi + (@ProtectedMode - _StmSmiEntryPoint) + 8000h] - DB 2eh - mov [rdi - 6], ax ; mov cs:[bx - 6], eax -; Switch into @ProtectedMode - mov rbx, cr0 - DB 66h - and ebx, 9ffafff3h - DB 66h - or ebx, 00000023h - - mov cr0, rbx - DB 66h, 0eah - DD ? - DW ? - -_StmGdtDesc FWORD ? -@ProtectedMode: - mov ax, PROTECT_MODE_DS - mov ds, ax - mov es, ax - mov fs, ax - mov gs, ax - mov ss, ax - DB 0bch ; mov esp, imm32 -gStmSmiStack DD ? - jmp ProtFlatMode - -ProtFlatMode: - DB 0b8h ; mov eax, offset gStmSmiCr3 -gStmSmiCr3 DD ? - mov cr3, rax - mov eax, 668h ; as cr4.PGE is not set here, refresh cr3 - mov cr4, rax ; in PreModifyMtrrs() to flush TLB. -; Load TSS - sub esp, 8 ; reserve room in stack - sgdt fword ptr [rsp] - mov eax, [rsp + 2] ; eax = GDT base - add esp, 8 - mov dl, 89h - mov [rax + TSS_SEGMENT + 5], dl ; clear busy flag - mov eax, TSS_SEGMENT - ltr ax - -; enable NXE if supported - DB 0b0h ; mov al, imm8 -gStmXdSupported DB 1 - cmp al, 0 - jz @SkipXd -; -; Check XD disable bit -; - mov ecx, MSR_IA32_MISC_ENABLE - rdmsr - sub esp, 4 - push rdx ; save MSR_IA32_MISC_ENABLE[63-32] - test edx, BIT2 ; MSR_IA32_MISC_ENABLE[34] - jz @f - and dx, 0FFFBh ; clear XD Disable bit if it is set - wrmsr -@@: - mov ecx, MSR_EFER - rdmsr - or ax, MSR_EFER_XD ; enable NXE - wrmsr - jmp @XdDone -@SkipXd: - sub esp, 8 -@XdDone: - -; Switch into @LongMode - push LONG_MODE_CS ; push cs hardcore here - call Base ; push return address for retf later -Base: - add dword ptr [rsp], @LongMode - Base; offset for far retf, seg is the 1st arg - - mov ecx, MSR_EFER - rdmsr - or ah, 1 ; enable LME - wrmsr - mov rbx, cr0 - or ebx, 080010023h ; enable paging + WP + NE + MP + PE - mov cr0, rbx - retf -@LongMode: ; long mode (64-bit code) starts here - mov rax, offset gStmSmiHandlerIdtr - lidt fword ptr [rax] - lea ebx, [rdi + DSC_OFFSET] - mov ax, [rbx + DSC_DS] - mov ds, eax - mov ax, [rbx + DSC_OTHERSEG] - mov es, eax - mov fs, eax - mov gs, eax - mov ax, [rbx + DSC_SS] - mov ss, eax - -CommonHandler: - mov rbx, [rsp + 0x08] ; rbx <- CpuIndex - - ; - ; Save FP registers - ; - sub rsp, 200h - DB 48h ; FXSAVE64 - fxsave [rsp] - - add rsp, -20h - - mov rcx, rbx - mov rax, CpuSmmDebugEntry - call rax - - mov rcx, rbx - mov rax, SmiRendezvous ; rax <- absolute addr of SmiRedezvous - call rax - - mov rcx, rbx - mov rax, CpuSmmDebugExit - call rax - - add rsp, 20h - - ; - ; Restore FP registers - ; - DB 48h ; FXRSTOR64 - fxrstor [rsp] - - add rsp, 200h - - mov rax, offset ASM_PFX(gStmXdSupported) - mov al, [rax] - cmp al, 0 - jz @f - pop rdx ; get saved MSR_IA32_MISC_ENABLE[63-32] - test edx, BIT2 - jz @f - mov ecx, MSR_IA32_MISC_ENABLE - rdmsr - or dx, BIT2 ; set XD Disable bit if it was set before entering into SMM - wrmsr - -@@: - rsm - -_StmSmiHandler: -; -; Check XD disable bit -; - xor r8, r8 - mov rax, offset ASM_PFX(gStmXdSupported) - mov al, [rax] - cmp al, 0 - jz @StmXdDone - mov ecx, MSR_IA32_MISC_ENABLE - rdmsr - mov r8, rdx ; save MSR_IA32_MISC_ENABLE[63-32] - test edx, BIT2 ; MSR_IA32_MISC_ENABLE[34] - jz @f - and dx, 0FFFBh ; clear XD Disable bit if it is set - wrmsr -@@: - mov ecx, MSR_EFER - rdmsr - or ax, MSR_EFER_XD ; enable NXE - wrmsr -@StmXdDone: - push r8 - - ; below step is needed, because STM does not run above code. - ; we have to run below code to set IDT/CR0/CR4 - mov rax, offset gStmSmiHandlerIdtr - lidt fword ptr [rax] - - mov rax, cr0 - or eax, 80010023h ; enable paging + WP + NE + MP + PE - mov cr0, rax - mov rax, cr4 - mov eax, 668h ; as cr4.PGE is not set here, refresh cr3 - mov cr4, rax ; in PreModifyMtrrs() to flush TLB. - ; STM init finish - jmp CommonHandler - -gcStmSmiHandlerSize DW $ - _StmSmiEntryPoint -gcStmSmiHandlerOffset DW _StmSmiHandler - _StmSmiEntryPoint - - END diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.asm b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.asm deleted file mode 100644 index 33e9860..0000000 --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.asm +++ /dev/null @@ -1,178 +0,0 @@ -;------------------------------------------------------------------------------ ; -; Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR> -; This program and the accompanying materials -; are licensed and made available under the terms and conditions of the BSD License -; which accompanies this distribution. The full text of the license may be found at -; http://opensource.org/licenses/bsd-license.php. -; -; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -; -; Module Name: -; -; SmiException.asm -; -; Abstract: -; -; Exception handlers used in SM mode -; -;------------------------------------------------------------------------------- - -EXTERNDEF gcStmPsd:BYTE - -EXTERNDEF SmmStmExceptionHandler:PROC -EXTERNDEF SmmStmSetup:PROC -EXTERNDEF SmmStmTeardown:PROC -EXTERNDEF gStmXdSupported:BYTE - -CODE_SEL EQU 38h -DATA_SEL EQU 20h -TR_SEL EQU 40h - -MSR_IA32_MISC_ENABLE EQU 1A0h -MSR_EFER EQU 0c0000080h -MSR_EFER_XD EQU 0800h - - .data - -; -; This structure serves as a template for all processors. -; -gcStmPsd LABEL BYTE - DB 'TXTPSSIG' - DW PSD_SIZE - DW 1 ; Version - DD 0 ; LocalApicId - DB 0Fh ; Cr4Pse;Cr4Pae;Intel64Mode;ExecutionDisableOutsideSmrr - DB 0 ; BIOS to STM - DB 0 ; STM to BIOS - DB 0 - DW CODE_SEL - DW DATA_SEL - DW DATA_SEL - DW DATA_SEL - DW TR_SEL - DW 0 - DQ 0 ; SmmCr3 - DQ _OnStmSetup - DQ _OnStmTeardown - DQ 0 ; SmmSmiHandlerRip - SMM guest entrypoint - DQ 0 ; SmmSmiHandlerRsp - DQ 0 - DD 0 - DD 80010100h ; RequiredStmSmmRevId - DQ _OnException - DQ 0 ; ExceptionStack - DW DATA_SEL - DW 01Fh ; ExceptionFilter - DD 0 - DQ 0 - DQ 0 ; BiosHwResourceRequirementsPtr - DQ 0 ; AcpiRsdp - DB 0 ; PhysicalAddressBits -PSD_SIZE = $ - offset gcStmPsd - - .code -;------------------------------------------------------------------------------ -; SMM Exception handlers -;------------------------------------------------------------------------------ -_OnException PROC - mov rcx, rsp - add rsp, -28h - call SmmStmExceptionHandler - add rsp, 28h - mov ebx, eax - mov eax, 4 - DB 0fh, 01h, 0c1h ; VMCALL - jmp $ -_OnException ENDP - -_OnStmSetup PROC -; -; Check XD disable bit -; - xor r8, r8 - mov rax, offset ASM_PFX(gStmXdSupported) - mov al, [rax] - cmp al, 0 - jz @StmXdDone1 - mov ecx, MSR_IA32_MISC_ENABLE - rdmsr - mov r8, rdx ; save MSR_IA32_MISC_ENABLE[63-32] - test edx, BIT2 ; MSR_IA32_MISC_ENABLE[34] - jz @f - and dx, 0FFFBh ; clear XD Disable bit if it is set - wrmsr -@@: - mov ecx, MSR_EFER - rdmsr - or ax, MSR_EFER_XD ; enable NXE - wrmsr -@StmXdDone1: - push r8 - - add rsp, -20h - call SmmStmSetup - add rsp, 20h - - mov rax, offset ASM_PFX(gStmXdSupported) - mov al, [rax] - cmp al, 0 - jz @f - pop rdx ; get saved MSR_IA32_MISC_ENABLE[63-32] - test edx, BIT2 - jz @f - mov ecx, MSR_IA32_MISC_ENABLE - rdmsr - or dx, BIT2 ; set XD Disable bit if it was set before entering into SMM - wrmsr -@@: - - rsm -_OnStmSetup ENDP - -_OnStmTeardown PROC -; -; Check XD disable bit -; - xor r8, r8 - mov rax, offset ASM_PFX(gStmXdSupported) - mov al, [rax] - cmp al, 0 - jz @StmXdDone2 - mov ecx, MSR_IA32_MISC_ENABLE - rdmsr - mov r8, rdx ; save MSR_IA32_MISC_ENABLE[63-32] - test edx, BIT2 ; MSR_IA32_MISC_ENABLE[34] - jz @f - and dx, 0FFFBh ; clear XD Disable bit if it is set - wrmsr -@@: - mov ecx, MSR_EFER - rdmsr - or ax, MSR_EFER_XD ; enable NXE - wrmsr -@StmXdDone2: - push r8 - - add rsp, -20h - call SmmStmTeardown - add rsp, 20h - - mov rax, offset ASM_PFX(gStmXdSupported) - mov al, [rax] - cmp al, 0 - jz @f - pop rdx ; get saved MSR_IA32_MISC_ENABLE[63-32] - test edx, BIT2 - jz @f - mov ecx, MSR_IA32_MISC_ENABLE - rdmsr - or dx, BIT2 ; set XD Disable bit if it was set before entering into SMM - wrmsr -@@: - - rsm -_OnStmTeardown ENDP - - END diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/Ia32/AsmFuncs.S b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/Ia32/AsmFuncs.S deleted file mode 100644 index ede19f2..0000000 --- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/Ia32/AsmFuncs.S +++ /dev/null @@ -1,38 +0,0 @@ -#------------------------------------------------------------------------------ -#* -#* Copyright (c) 2012, Intel Corporation. All rights reserved.<BR> -#* This program and the accompanying materials -#* are licensed and made available under the terms and conditions of the BSD License -#* which accompanies this distribution. The full text of the license may be found at -#* http://opensource.org/licenses/bsd-license.php -#* -#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -#* -#* AsmFuncs.S -#* -#* Abstract: -#* -#* Assembly function to set segment selectors. -# -#------------------------------------------------------------------------------ - -.text - -#------------------------------------------------------------------------------ -# -# VOID -# EFIAPI -# AsmSetDataSelectors ( -# IN UINT16 SelectorValue -# ); -#------------------------------------------------------------------------------ -ASM_GLOBAL ASM_PFX(AsmSetDataSelectors) -ASM_PFX(AsmSetDataSelectors): - movl 4(%esp), %eax - movw %ax, %ss - movw %ax, %ds - movw %ax, %es - movw %ax, %fs - movw %ax, %gs - ret diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/Ia32/AsmFuncs.asm b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/Ia32/AsmFuncs.asm deleted file mode 100644 index 79496c4..0000000 --- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/Ia32/AsmFuncs.asm +++ /dev/null @@ -1,45 +0,0 @@ -;------------------------------------------------------------------------------ ; -; Copyright (c) 2012, Intel Corporation. All rights reserved.<BR> -; This program and the accompanying materials -; are licensed and made available under the terms and conditions of the BSD License -; which accompanies this distribution. The full text of the license may be found at -; http://opensource.org/licenses/bsd-license.php. -; -; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -; -; Module Name: -; -; AsmFuncs.Asm -; -; Abstract: -; -; Assembly function to set segment selectors. -; -; Notes: -; -;------------------------------------------------------------------------------ - -.686 -.model flat,C - -.code - -;------------------------------------------------------------------------------ -; VOID -; EFIAPI -; AsmSetDataSelectors ( -; IN UINT16 SelectorValue -; ); -;------------------------------------------------------------------------------ -AsmSetDataSelectors PROC near public - mov eax, [esp + 4] - mov ds, ax - mov es, ax - mov fs, ax - mov gs, ax - mov ss, ax - ret -AsmSetDataSelectors ENDP - -END diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf index 47fecd7..407aab6 100644 --- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf +++ b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf @@ -37,14 +37,10 @@ S3Resume.c [Sources.IA32] - Ia32/AsmFuncs.asm Ia32/AsmFuncs.nasm - Ia32/AsmFuncs.S [Sources.X64] - X64/AsmFuncs.asm X64/AsmFuncs.nasm - X64/AsmFuncs.S [Packages] MdePkg/MdePkg.dec diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/X64/AsmFuncs.S b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/X64/AsmFuncs.S deleted file mode 100644 index 2ced09f..0000000 --- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/X64/AsmFuncs.S +++ /dev/null @@ -1,37 +0,0 @@ -#------------------------------------------------------------------------------ -#* -#* Copyright (c) 2012, Intel Corporation. All rights reserved.<BR> -#* This program and the accompanying materials -#* are licensed and made available under the terms and conditions of the BSD License -#* which accompanies this distribution. The full text of the license may be found at -#* http://opensource.org/licenses/bsd-license.php -#* -#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -#* -#* AsmFuncs.S -#* -#* Abstract: -#* -#* Assembly function to set segment selectors. -# -#------------------------------------------------------------------------------ - -.text - -#------------------------------------------------------------------------------ -# -# VOID -# EFIAPI -# AsmSetDataSelectors ( -# IN UINT16 SelectorValue -# ); -#------------------------------------------------------------------------------ -ASM_GLOBAL ASM_PFX(AsmSetDataSelectors) -ASM_PFX(AsmSetDataSelectors): - movw %cx, %ss - movw %cx, %ds - movw %cx, %es - movw %cx, %fs - movw %cx, %gs - ret diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/X64/AsmFuncs.asm b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/X64/AsmFuncs.asm deleted file mode 100644 index eb014a5..0000000 --- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/X64/AsmFuncs.asm +++ /dev/null @@ -1,41 +0,0 @@ -;------------------------------------------------------------------------------ ; -; Copyright (c) 2012, Intel Corporation. All rights reserved.<BR> -; This program and the accompanying materials -; are licensed and made available under the terms and conditions of the BSD License -; which accompanies this distribution. The full text of the license may be found at -; http://opensource.org/licenses/bsd-license.php. -; -; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -; -; Module Name: -; -; AsmFuncs.Asm -; -; Abstract: -; -; Assembly function to set segment selectors. -; -; Notes: -; -;------------------------------------------------------------------------------ - -.code - -;------------------------------------------------------------------------------ -; VOID -; EFIAPI -; AsmSetDataSelectors ( -; IN UINT16 SelectorValue -; ); -;------------------------------------------------------------------------------ -AsmSetDataSelectors PROC - mov ds, cx - mov es, cx - mov fs, cx - mov gs, cx - mov ss, cx - ret -AsmSetDataSelectors ENDP - -END -- 2.8.0.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
