On Fri, Feb 01, 2019 at 09:34:31PM +0800, Ming Huang wrote:
> Add setup item "Support DPC" to enable or disable PCIe DPC
> (Downstream Port Containment).
This patch also seems to disable the SRIOV configuration and delete a
lot of ports. Can you explain how this is related?
/
Leif
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <ming.hu...@linaro.org>
> ---
> Silicon/Hisilicon/Include/Library/OemConfigData.h | 1 +
> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr | 2 -
> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c | 4 +
> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr | 197
> +-------------------
> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni | 3 +-
> 5 files changed, 10 insertions(+), 197 deletions(-)
>
> diff --git a/Silicon/Hisilicon/Include/Library/OemConfigData.h
> b/Silicon/Hisilicon/Include/Library/OemConfigData.h
> index f120e3123c83..c0097d0829f0 100644
> --- a/Silicon/Hisilicon/Include/Library/OemConfigData.h
> +++ b/Silicon/Hisilicon/Include/Library/OemConfigData.h
> @@ -49,6 +49,7 @@ typedef struct {
> UINT8 OSWdtAction;
> /*PCIe Config*/
> UINT8 PcieSRIOVSupport;
> + UINT8 PcieDPCSupport;
> UINT8 PciePort[PCIE_MAX_TOTAL_PORTS];
> UINT8 PcieLinkSpeedPort[PCIE_MAX_TOTAL_PORTS];
> UINT8 PcieLinkDeEmphasisPort[PCIE_MAX_TOTAL_PORTS];
> diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
> b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
> index 08236704fbfe..93ccb99bdc67 100644
> --- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
> +++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
> @@ -62,11 +62,9 @@ formset
> prompt = STRING_TOKEN(STR_IBMC_CONFIG_FORM_TITLE),
> help = STRING_TOKEN(STR_IBMC_CONFIG_FORM_HELP);
>
> - suppressif TRUE;
> goto PCIE_CONFIG_FORM_ID,
> prompt = STRING_TOKEN(STR_PCIE_CONFIG_FORM_TITLE),
> help = STRING_TOKEN(STR_PCIE_CONFIG_FORM_HELP);
> - endif;
>
> goto MISC_CONFIG_FORM_ID,
> prompt = STRING_TOKEN(STR_MISC_CONFIG_FORM_TITLE),
> diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
> b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
> index 6668103af027..be4ce8820f73 100644
> --- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
> +++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
> @@ -290,6 +290,10 @@ OemConfigUiLibConstructor (
> Configuration.OSWdtTimeout = 5;
> Configuration.OSWdtAction = 1;
> //
> + //Set the default value of the PCIe option
> + //
> + Configuration.PcieDPCSupport = 0;
> + //
> //Set the default value of the Misc option
> //
> Configuration.EnableSmmu = 1;
> diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
> b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
> index 7cf7cdd29ba2..c65907fe846e 100644
> --- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
> +++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
> @@ -17,203 +17,12 @@
> form formid = PCIE_CONFIG_FORM_ID,
> title = STRING_TOKEN (STR_PCIE_CONFIG_FORM_TITLE);
>
> - goto VFR_FORMID_PCIE_SOCKET0,
> - prompt = STRING_TOKEN (STR_PCIE_CPU_0_PROMPT),
> - help = STRING_TOKEN (STR_PCIE_CPU_PROMPT_HELP);
> -
> - goto VFR_FORMID_PCIE_SOCKET1,
> - prompt = STRING_TOKEN (STR_PCIE_CPU_1_PROMPT),
> - help = STRING_TOKEN (STR_PCIE_CPU_PROMPT_HELP);
> -
> - oneof varid = OEM_CONFIG_DATA.PcieSRIOVSupport,
> - prompt = STRING_TOKEN (STR_SRIOV_SUPPORT_PROMPT),
> - help = STRING_TOKEN (STR_SRIOV_SUPPORT_HELP),
> + oneof varid = OEM_CONFIG_DATA.PcieDPCSupport,
> + prompt = STRING_TOKEN (STR_DPC_SUPPORT_PROMPT),
> + help = STRING_TOKEN (STR_DPC_SUPPORT_HELP),
> option text = STRING_TOKEN (STR_DISABLE), value = 0, flags =
> MANUFACTURING | DEFAULT | RESET_REQUIRED;
> option text = STRING_TOKEN (STR_ENABLE), value = 1, flags =
> RESET_REQUIRED;
> endoneof;
>
> endform;
>
> -form formid = VFR_FORMID_PCIE_SOCKET0,
> - title = STRING_TOKEN(STR_PCIE_CPU_0_PROMPT);
> -
> - goto VFR_FORMID_PCIE_PORT2,
> - prompt = STRING_TOKEN(STR_PCIE_PORT_2_PROMPT),
> - help = STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
> -
> - goto VFR_FORMID_PCIE_PORT4,
> - prompt = STRING_TOKEN(STR_PCIE_PORT_4_PROMPT),
> - help = STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
> -
> - goto VFR_FORMID_PCIE_PORT5,
> - prompt = STRING_TOKEN(STR_PCIE_PORT_5_PROMPT),
> - help = STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
> -
> - goto VFR_FORMID_PCIE_PORT6,
> - prompt = STRING_TOKEN(STR_PCIE_PORT_6_PROMPT),
> - help = STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
> -
> - goto VFR_FORMID_PCIE_PORT7,
> - prompt = STRING_TOKEN(STR_PCIE_PORT_7_PROMPT),
> - help = STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
> -
> -endform;
> -
> -form formid = VFR_FORMID_PCIE_SOCKET1,
> - title = STRING_TOKEN(STR_PCIE_CPU_1_PROMPT);
> - goto VFR_FORMID_PCIE_PORT10,
> - prompt = STRING_TOKEN(STR_PCIE_PORT_10_PROMPT),
> - help = STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
> -
> - goto VFR_FORMID_PCIE_PORT12,
> - prompt = STRING_TOKEN(STR_PCIE_PORT_12_PROMPT),
> - help = STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
> -
> - goto VFR_FORMID_PCIE_PORT13,
> - prompt = STRING_TOKEN(STR_PCIE_PORT_13_PROMPT),
> - help = STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
> -endform;
> -
> -form formid = VFR_FORMID_PCIE_PORT0,
> - title = STRING_TOKEN(STR_PCIE_PORT_0_PROMPT);
> - #undef INDEX
> - #define INDEX 0
> - #include "PciePortConfig.hfr"
> -
> -endform;
> -
> -form formid = VFR_FORMID_PCIE_PORT1,
> - title = STRING_TOKEN(STR_PCIE_PORT_1_PROMPT);
> -
> - #undef INDEX
> - #define INDEX 1
> - #include "PciePortConfig.hfr"
> -
> -endform;
> -
> -form formid = VFR_FORMID_PCIE_PORT2,
> - title = STRING_TOKEN(STR_PCIE_PORT_2_PROMPT);
> -
> - #undef INDEX
> - #define INDEX 2
> - #include "PciePortConfig.hfr"
> -
> -endform;
> -
> -form formid = VFR_FORMID_PCIE_PORT3,
> - title = STRING_TOKEN(STR_PCIE_PORT_3_PROMPT);
> -
> - #undef INDEX
> - #define INDEX 3
> - #include "PciePortConfig.hfr"
> -
> -endform;
> -
> -form formid = VFR_FORMID_PCIE_PORT4,
> - title = STRING_TOKEN(STR_PCIE_PORT_4_PROMPT);
> -
> - #undef INDEX
> - #define INDEX 4
> - #include "PciePortConfig.hfr"
> -
> -endform;
> -
> -form formid = VFR_FORMID_PCIE_PORT5,
> - title = STRING_TOKEN(STR_PCIE_PORT_5_PROMPT);
> -
> - #undef INDEX
> - #define INDEX 5
> - #include "PciePortConfig.hfr"
> -
> -endform;
> -
> -form formid = VFR_FORMID_PCIE_PORT6,
> - title = STRING_TOKEN(STR_PCIE_PORT_6_PROMPT);
> -
> - #undef INDEX
> - #define INDEX 6
> - #include "PciePortConfig.hfr"
> -
> -endform;
> -
> -form formid = VFR_FORMID_PCIE_PORT7,
> - title = STRING_TOKEN(STR_PCIE_PORT_7_PROMPT);
> -
> - #undef INDEX
> - #define INDEX 7
> - #include "PciePortConfig.hfr"
> -
> -endform;
> -
> -form formid = VFR_FORMID_PCIE_PORT8,
> - title = STRING_TOKEN(STR_PCIE_PORT_8_PROMPT);
> -
> - #undef INDEX
> - #define INDEX 8
> - #include "PciePortConfig.hfr"
> -
> -endform;
> -
> -form formid = VFR_FORMID_PCIE_PORT9,
> - title = STRING_TOKEN(STR_PCIE_PORT_9_PROMPT);
> -
> - #undef INDEX
> - #define INDEX 9
> - #include "PciePortConfig.hfr"
> -
> -endform;
> -
> -form formid = VFR_FORMID_PCIE_PORT10,
> - title = STRING_TOKEN(STR_PCIE_PORT_10_PROMPT);
> -
> - #undef INDEX
> - #define INDEX 10
> - #include "PciePortConfig.hfr"
> -
> -endform;
> -
> -form formid = VFR_FORMID_PCIE_PORT11,
> - title = STRING_TOKEN(STR_PCIE_PORT_11_PROMPT);
> -
> - #undef INDEX
> - #define INDEX 11
> - #include "PciePortConfig.hfr"
> -
> -endform;
> -
> -form formid = VFR_FORMID_PCIE_PORT12,
> - title = STRING_TOKEN(STR_PCIE_PORT_12_PROMPT);
> -
> - #undef INDEX
> - #define INDEX 12
> - #include "PciePortConfig.hfr"
> -
> -endform;
> -
> -form formid = VFR_FORMID_PCIE_PORT13,
> - title = STRING_TOKEN(STR_PCIE_PORT_13_PROMPT);
> -
> - #undef INDEX
> - #define INDEX 13
> - #include "PciePortConfig.hfr"
> -
> -endform;
> -
> -form formid = VFR_FORMID_PCIE_PORT14,
> - title = STRING_TOKEN(STR_PCIE_PORT_14_PROMPT);
> -
> - #undef INDEX
> - #define INDEX 14
> - #include "PciePortConfig.hfr"
> -
> -endform;
> -
> -form formid = VFR_FORMID_PCIE_PORT15,
> - title = STRING_TOKEN(STR_PCIE_PORT_15_PROMPT);
> -
> - #undef INDEX
> - #define INDEX 15
> - #include "PciePortConfig.hfr"
> -
> -endform;
> -
> diff --git
> a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni
> b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni
> index d87d30f975b8..0127ea952dee 100644
> --- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni
> +++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni
> @@ -26,7 +26,8 @@
> #string STR_PCIE_CPU_1_PROMPT #language en-US "CPU 1 PCIE
> Configuration"
> #string STR_SRIOV_SUPPORT_PROMPT #language en-US "SRIOV"
> #string STR_SRIOV_SUPPORT_HELP #language en-US "This option enables
> / disables the SRIOV function"
> -
> +#string STR_DPC_SUPPORT_PROMPT #language en-US "Support DPC"
> +#string STR_DPC_SUPPORT_HELP #language en-US "This option enables
> / disables the DPC function"
> #string STR_PCIE_PORT_PROMPT_HELP #language en-US "Press <Enter> to
> config this port."
> #string STR_PCIE_PORT_0_NULL_PROMPT #language en-US ""
> #string STR_PCIE_PORT_0_PROMPT #language en-US "CPU 0 Pcie - Port 0"
> --
> 2.9.5
>
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