From: Reza Jelveh <reza.jel...@tuhh.de>
SataController reads host capabalities when the module is first loaded.
The Initialize method should only install the protocol. All host
specific information is read when ChannelInfo is accessed.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Reza Jelveh <reza.jel...@tuhh.de>
---
.../Bus/Pci/SataControllerDxe/SataController.c | 115 +++++++++++----------
1 file changed, 58 insertions(+), 57 deletions(-)
diff --git a/PcAtChipsetPkg/Bus/Pci/SataControllerDxe/SataController.c
b/PcAtChipsetPkg/Bus/Pci/SataControllerDxe/SataController.c
index 1807c88..944aba2 100644
--- a/PcAtChipsetPkg/Bus/Pci/SataControllerDxe/SataController.c
+++ b/PcAtChipsetPkg/Bus/Pci/SataControllerDxe/SataController.c
@@ -390,10 +390,7 @@ SataControllerStart (
{
EFI_STATUS Status;
EFI_PCI_IO_PROTOCOL *PciIo;
- PCI_TYPE00 PciData;
EFI_SATA_CONTROLLER_PRIVATE_DATA *SataPrivateData;
- UINT32 Data32;
- UINTN ChannelDeviceCount;
DEBUG ((EFI_D_INFO, "SataControllerStart START\n"));
@@ -437,50 +434,6 @@ SataControllerStart (
SataPrivateData->IdeInit.SetTiming = IdeInitSetTiming;
SataPrivateData->IdeInit.EnumAll = SATA_ENUMER_ALL;
- Status = PciIo->Pci.Read (
- PciIo,
- EfiPciIoWidthUint8,
- PCI_CLASSCODE_OFFSET,
- sizeof (PciData.Hdr.ClassCode),
- PciData.Hdr.ClassCode
- );
- ASSERT_EFI_ERROR (Status);
-
- if (IS_PCI_IDE (&PciData)) {
- SataPrivateData->IdeInit.ChannelCount = IDE_MAX_CHANNEL;
- SataPrivateData->DeviceCount = IDE_MAX_DEVICES;
- } else if (IS_PCI_SATADPA (&PciData)) {
- //
- // Read Host Capability Register(CAP) to get Number of Ports(NPS) and
Supports Port Multiplier(SPM)
- // NPS is 0's based value indicating the maximum number of ports
supported by the HBA silicon.
- // A maximum of 32 ports can be supported. A value of '0h', indicating
one port, is the minimum requirement.
- //
- Data32 = AhciReadReg (PciIo, R_AHCI_CAP);
- SataPrivateData->IdeInit.ChannelCount = (UINT8) ((Data32 & B_AHCI_CAP_NPS)
+ 1);
- SataPrivateData->DeviceCount = AHCI_MAX_DEVICES;
- if ((Data32 & B_AHCI_CAP_SPM) == B_AHCI_CAP_SPM) {
- SataPrivateData->DeviceCount = AHCI_MULTI_MAX_DEVICES;
- }
- }
-
- ChannelDeviceCount = (UINTN) (SataPrivateData->IdeInit.ChannelCount) *
(UINTN) (SataPrivateData->DeviceCount);
- SataPrivateData->DisqulifiedModes = AllocateZeroPool ((sizeof
(EFI_ATA_COLLECTIVE_MODE)) * ChannelDeviceCount);
- if (SataPrivateData->DisqulifiedModes == NULL) {
- Status = EFI_OUT_OF_RESOURCES;
- goto Done;
- }
-
- SataPrivateData->IdentifyData = AllocateZeroPool ((sizeof
(EFI_IDENTIFY_DATA)) * ChannelDeviceCount);
- if (SataPrivateData->IdentifyData == NULL) {
- Status = EFI_OUT_OF_RESOURCES;
- goto Done;
- }
-
- SataPrivateData->IdentifyValid = AllocateZeroPool ((sizeof (BOOLEAN)) *
ChannelDeviceCount);
- if (SataPrivateData->IdentifyValid == NULL) {
- Status = EFI_OUT_OF_RESOURCES;
- goto Done;
- }
//
// Install IDE Controller Init Protocol to this instance
@@ -502,15 +455,6 @@ Done:
Controller
);
if (SataPrivateData != NULL) {
- if (SataPrivateData->DisqulifiedModes != NULL) {
- FreePool (SataPrivateData->DisqulifiedModes);
- }
- if (SataPrivateData->IdentifyData != NULL) {
- FreePool (SataPrivateData->IdentifyData);
- }
- if (SataPrivateData->IdentifyValid != NULL) {
- FreePool (SataPrivateData->IdentifyValid);
- }
FreePool (SataPrivateData);
}
}
@@ -648,18 +592,75 @@ IdeInitGetChannelInfo (
OUT UINT8 *MaxDevices
)
{
+ EFI_STATUS Status;
+ PCI_TYPE00 PciData;
EFI_SATA_CONTROLLER_PRIVATE_DATA *SataPrivateData;
+ UINT32 Data32;
+ UINTN ChannelDeviceCount;
+
SataPrivateData = SATA_CONTROLLER_PRIVATE_DATA_FROM_THIS (This);
ASSERT (SataPrivateData != NULL);
+ Status = SataPrivateData->PciIo->Pci.Read (
+ SataPrivateData->PciIo,
+ EfiPciIoWidthUint8,
+ PCI_CLASSCODE_OFFSET,
+ sizeof (PciData.Hdr.ClassCode),
+ PciData.Hdr.ClassCode
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ if (IS_PCI_IDE (&PciData)) {
+ SataPrivateData->IdeInit.ChannelCount = IDE_MAX_CHANNEL;
+ SataPrivateData->DeviceCount = IDE_MAX_DEVICES;
+ } else if (IS_PCI_SATADPA (&PciData)) {
+ //
+ // Read Host Capability Register(CAP) to get Number of Ports(NPS) and
Supports Port Multiplier(SPM)
+ // NPS is 0's based value indicating the maximum number of ports
supported by the HBA silicon.
+ // A maximum of 32 ports can be supported. A value of '0h', indicating
one port, is the minimum requirement.
+ //
+ Data32 = AhciReadReg (SataPrivateData->PciIo, R_AHCI_CAP);
+ SataPrivateData->IdeInit.ChannelCount = (UINT8) ((Data32 & B_AHCI_CAP_NPS)
+ 1);
+ SataPrivateData->DeviceCount = AHCI_MAX_DEVICES;
+ if ((Data32 & B_AHCI_CAP_SPM) == B_AHCI_CAP_SPM) {
+ SataPrivateData->DeviceCount = AHCI_MULTI_MAX_DEVICES;
+ }
+ }
+
+ ChannelDeviceCount = (UINTN) (SataPrivateData->IdeInit.ChannelCount) *
(UINTN) (SataPrivateData->DeviceCount);
+ if (SataPrivateData->DisqulifiedModes == NULL) {
+ SataPrivateData->DisqulifiedModes = AllocateZeroPool ((sizeof
(EFI_ATA_COLLECTIVE_MODE)) * ChannelDeviceCount);
+ if (SataPrivateData->DisqulifiedModes == NULL) {
+ Status = EFI_OUT_OF_RESOURCES;
+ goto Done;
+ }
+ }
+ if (SataPrivateData->IdentifyData == NULL) {
+ SataPrivateData->IdentifyData = AllocateZeroPool ((sizeof
(EFI_IDENTIFY_DATA)) * ChannelDeviceCount);
+ if (SataPrivateData->IdentifyData == NULL) {
+ Status = EFI_OUT_OF_RESOURCES;
+ goto Done;
+ }
+ }
+ if (SataPrivateData->IdentifyValid == NULL) {
+ SataPrivateData->IdentifyValid = AllocateZeroPool ((sizeof (BOOLEAN)) *
ChannelDeviceCount);
+ if (SataPrivateData->IdentifyValid == NULL) {
+ Status = EFI_OUT_OF_RESOURCES;
+ goto Done;
+ }
+ }
+
if (Channel < This->ChannelCount) {
*Enabled = TRUE;
*MaxDevices = SataPrivateData->DeviceCount;
return EFI_SUCCESS;
}
+ Status = EFI_INVALID_PARAMETER;
+
+Done:
*Enabled = FALSE;
- return EFI_INVALID_PARAMETER;
+ return Status;
}
/**
--
1.9.2
------------------------------------------------------------------------------
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