In the ARM world, it is quite common to have NOR flash at 0x0 and DRAM
elsewhere. Don't treat pointers to FVs residing there as invalid NULL pointers
but as a valid 0x0 physical address.
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
MdeModulePkg/Core/Pei/FwVol/FwVol.c | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/MdeModulePkg/Core/Pei/FwVol/FwVol.c
b/MdeModulePkg/Core/Pei/FwVol/FwVol.c
index fe876ed393a9..8186a80276d3 100644
--- a/MdeModulePkg/Core/Pei/FwVol/FwVol.c
+++ b/MdeModulePkg/Core/Pei/FwVol/FwVol.c
@@ -1422,10 +1422,6 @@ PeiFfsFvPpiProcessVolume (
ASSERT (FvHandle != NULL);
- if (Buffer == NULL) {
- return EFI_VOLUME_CORRUPTED;
- }
-
//
// The build-in EFI_PEI_FIRMWARE_VOLUME_PPI for FFS2/FFS3 support
memory-mapped
// FV image and the handle is pointed to Fv image's buffer.
@@ -1712,7 +1708,7 @@ PeiFfsFvPpiGetVolumeInfo (
EFI_FIRMWARE_VOLUME_HEADER FwVolHeader;
EFI_FIRMWARE_VOLUME_EXT_HEADER *FwVolExHeaderInfo;
- if ((VolumeInfo == NULL) || (FvHandle == NULL)) {
+ if (VolumeInfo == NULL) {
return EFI_INVALID_PARAMETER;
}
--
1.8.3.2
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