> On Nov 26, 2014, at 11:10 AM, Jordan Justen <jordan.l.jus...@intel.com> wrote:
>
> On 2014-11-13 17:34:59, Chen, Fan wrote:
>> On Thu, 2014-11-13 at 10:42 -0800, Jordan Justen wrote:
>>> On 2014-11-06 17:23:01, Fan, Jeff wrote:
>>>> Chen,
>>>>
>>>> Thanks your contribution. I will check-in your patch if there is no
>>>> further comments from other guys.
>>>>
>>>> Reviewed-by: Jeff Fan <jeff....@intel.com <mailto:jeff....@intel.com>>
>>>
>>> Chen,
>>>
>>> I committed your series (r16345-r16371) for Jeff (to preserve the
>>> separate patches).
>>>
>>> Thanks for all your work on this!
>>>
>>> Let me know if you are interested in working on some follow up MP
>>> tasks. (I have 2 ideas. :)
>> Of course, I hope to help improve the MP.
>
> One idea I have is to initialize the interrupt vector table on the
> APs, and then allow the APs to run the CpuSleep function.
>
> Like IdleLoopEventCallback does for the BSP, this should put the APs
> into a lower power state while they are not working.
>
> Then the BSP can send the APs an 'interrupt IPI' when needed to wake
> the APs to do work. (I think SendFixedIpiAllExcludingSelf?)
>
> I think the DXE Core installs the IVT (Interrupt Vector Table) by
> calling InitializeCpuExceptionHandlers, and CpuDxe modifies the
> interrupt handler entries.
>
> But for the simpler situation of the APs, this might be more than
> needed. Instead maybe just setting up the IVT and calling AsmWriteIdtr
> would be all that is needed.
>
> One easy way to see if this is working is to run 'top' while using
> qemu with smp. In the current state the APs will cause a few threads
> to use 100% of the cpu while they busy-wait for something to do. (This
> only applies to OVMF boot, and the UEFI Shell, since once the OS
> manages the APs, they will be handled more efficiently.)
>
Do you need an IDT to “make it work”. Just send a SIPI. I’m assuming the IPI
would wake the processor out of the hlt?
> I think this task would be fairly challenging depending on your
> background experience with x86 processor interrupts.
>
There is lots of documentation, and there are examples in the edk2. The
important thing to remember is some exceptions push an error code, and some do
not, thus the stack is not always the same.
https://svn.code.sf.net/p/edk2/code/trunk/edk2/UefiCpuPkg/Library/CpuExceptionHandlerLib/
<https://svn.code.sf.net/p/edk2/code/trunk/edk2/UefiCpuPkg/Library/CpuExceptionHandlerLib/>
There is also an example in the DXE IPL of adding a simple X64 IDT where each
handler does an infinite loop. It is a little funky as it could be 32-bit code
generating a 64-bit IDT. So you don’t really need to copy.
https://svn.code.sf.net/p/edk2/code/trunk/edk2/MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c
<https://svn.code.sf.net/p/edk2/code/trunk/edk2/MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c>
It also looks like the SourceLevelDebugPkg will hook and IDT
https://svn.code.sf.net/p/edk2/code/trunk/edk2/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/ArchDebugSupport.c
<https://svn.code.sf.net/p/edk2/code/trunk/edk2/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/ArchDebugSupport.c>
Thanks,
Andrew Fish
> If anyone else on the list thinks we should take a different approach,
> please speak up!
>
> -Jordan
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