Remove use of CMOVx instruction from IA32 assembly files in BaseLib. This
matches compiler flags for all supported C compilers.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off by: Michael Kinney
<michael.d.kin...@intel.com<mailto:michael.d.kin...@intel.com>>
Index: Library/BaseLib/BaseLib.inf
===================================================================
--- Library/BaseLib/BaseLib.inf (revision 17201)
+++ Library/BaseLib/BaseLib.inf (working copy)
@@ -1,7 +1,7 @@
## @file
# Base Library implementation.
#
-# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
#
@@ -21,7 +21,7 @@
MODULE_UNI_FILE = BaseLib.uni
FILE_GUID = 27d67720-ea68-48ae-93da-a3a074c90e30
MODULE_TYPE = BASE
- VERSION_STRING = 1.0
+ VERSION_STRING = 1.1
LIBRARY_CLASS = BaseLib
#
Index: Library/BaseLib/Ia32/ARShiftU64.asm
===================================================================
--- Library/BaseLib/Ia32/ARShiftU64.asm (revision 17201)
+++ Library/BaseLib/Ia32/ARShiftU64.asm (working copy)
@@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
-; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD
License
; which accompanies this distribution. The full text of the license may be
found at
@@ -36,8 +36,10 @@
mov eax, [esp + 8]
cdq
test cl, 32
- cmovz edx, eax
- cmovz eax, [esp + 4]
+ jnz @F
+ mov edx, eax
+ mov eax, [esp + 4]
+@@:
shrd eax, edx, cl
sar edx, cl
ret
Index: Library/BaseLib/Ia32/ARShiftU64.c
===================================================================
--- Library/BaseLib/Ia32/ARShiftU64.c (revision 17201)
+++ Library/BaseLib/Ia32/ARShiftU64.c (working copy)
@@ -1,7 +1,7 @@
/** @file
64-bit arithmetic right shift function for IA-32.
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD
License
which accompanies this distribution. The full text of the license may be
found at
@@ -40,8 +40,10 @@
mov eax, dword ptr [Operand + 4]
cdq
test cl, 32
- cmovz edx, eax
- cmovz eax, dword ptr [Operand + 0]
+ jnz L0
+ mov edx, eax
+ mov eax, dword ptr [Operand + 0]
+L0:
shrd eax, edx, cl
sar edx, cl
}
Index: Library/BaseLib/Ia32/ARShiftU64.S
===================================================================
--- Library/BaseLib/Ia32/ARShiftU64.S (revision 17201)
+++ Library/BaseLib/Ia32/ARShiftU64.S (working copy)
@@ -1,6 +1,6 @@
#------------------------------------------------------------------------------
#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD
License
# which accompanies this distribution. The full text of the license may be
found at
@@ -34,8 +34,10 @@
movl 8(%esp), %eax
cltd
testb $32, %cl
- cmovz %eax, %edx
- cmovz 4(%esp), %eax
+ jnz L0
+ movl %eax, %edx
+ movl 4(%esp), %eax
+L0:
shrdl %cl, %edx, %eax
sar %cl, %edx
ret
Index: Library/BaseLib/Ia32/LRotU64.asm
===================================================================
--- Library/BaseLib/Ia32/LRotU64.asm (revision 17201)
+++ Library/BaseLib/Ia32/LRotU64.asm (working copy)
@@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
-; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD
License
; which accompanies this distribution. The full text of the license may be
found at
@@ -40,9 +40,11 @@
ror ebx, cl
shld eax, ebx, cl
test cl, 32 ; Count >= 32?
- cmovnz ecx, eax
- cmovnz eax, edx
- cmovnz edx, ecx
+ jz @F
+ mov ecx, eax
+ mov eax, edx
+ mov edx, ecx
+@@:
ret
InternalMathLRotU64 ENDP
Index: Library/BaseLib/Ia32/LRotU64.c
===================================================================
--- Library/BaseLib/Ia32/LRotU64.c (revision 17201)
+++ Library/BaseLib/Ia32/LRotU64.c (working copy)
@@ -1,7 +1,7 @@
/** @file
64-bit left rotation for Ia32
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD
License
which accompanies this distribution. The full text of the license may be
found at
@@ -45,9 +45,11 @@
ror ebx, cl
shld eax, ebx, cl
test cl, 32 ; Count >= 32?
- cmovnz ecx, eax
- cmovnz eax, edx
- cmovnz edx, ecx
+ jz L0
+ mov ecx, eax
+ mov eax, edx
+ mov edx, ecx
+L0:
}
}
Index: Library/BaseLib/Ia32/LRotU64.S
===================================================================
--- Library/BaseLib/Ia32/LRotU64.S (revision 17201)
+++ Library/BaseLib/Ia32/LRotU64.S (working copy)
@@ -1,6 +1,6 @@
#------------------------------------------------------------------------------
#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD
License
# which accompanies this distribution. The full text of the license may be
found at
@@ -39,8 +39,10 @@
rorl %cl, %ebx
shldl %cl, %ebx, %eax
testb $32, %cl # Count >= 32?
- cmovnz %eax, %ecx
- cmovnz %edx, %eax
- cmovnz %ecx, %edx
+ jz L0
+ movl %eax, %ecx
+ movl %edx, %eax
+ movl %ecx, %edx
+L0:
pop %ebx
ret
Index: Library/BaseLib/Ia32/LShiftU64.asm
===================================================================
--- Library/BaseLib/Ia32/LShiftU64.asm (revision 17201)
+++ Library/BaseLib/Ia32/LShiftU64.asm (working copy)
@@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
-; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD
License
; which accompanies this distribution. The full text of the license may be
found at
@@ -36,8 +36,10 @@
xor eax, eax
mov edx, [esp + 4]
test cl, 32 ; Count >= 32?
- cmovz eax, edx
- cmovz edx, [esp + 8]
+ jnz @F
+ mov eax, edx
+ mov edx, [esp + 8]
+@@:
shld edx, eax, cl
shl eax, cl
ret
Index: Library/BaseLib/Ia32/LShiftU64.c
===================================================================
--- Library/BaseLib/Ia32/LShiftU64.c (revision 17201)
+++ Library/BaseLib/Ia32/LShiftU64.c (working copy)
@@ -1,7 +1,7 @@
/** @file
64-bit left shift function for IA-32.
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD
License
which accompanies this distribution. The full text of the license may be
found at
@@ -40,8 +40,10 @@
xor eax, eax
mov edx, dword ptr [Operand + 0]
test cl, 32 // Count >= 32?
- cmovz eax, edx
- cmovz edx, dword ptr [Operand + 4]
+ jnz L0
+ mov eax, edx
+ mov edx, dword ptr [Operand + 4]
+L0:
shld edx, eax, cl
shl eax, cl
}
Index: Library/BaseLib/Ia32/LShiftU64.S
===================================================================
--- Library/BaseLib/Ia32/LShiftU64.S (revision 17201)
+++ Library/BaseLib/Ia32/LShiftU64.S (working copy)
@@ -1,6 +1,6 @@
#------------------------------------------------------------------------------
#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD
License
# which accompanies this distribution. The full text of the license may be
found at
@@ -34,8 +34,10 @@
xorl %eax, %eax
movl 4(%esp), %edx
testb $32, %cl # Count >= 32?
- cmovz %edx, %eax
- cmovz 0x8(%esp), %edx
+ jnz L0
+ movl %edx, %eax
+ movl 0x8(%esp), %edx
+L0:
shld %cl, %eax, %edx
shl %cl, %eax
ret
Index: Library/BaseLib/Ia32/RRotU64.asm
===================================================================
--- Library/BaseLib/Ia32/RRotU64.asm (revision 17201)
+++ Library/BaseLib/Ia32/RRotU64.asm (working copy)
@@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
-; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD
License
; which accompanies this distribution. The full text of the license may be
found at
@@ -40,9 +40,11 @@
rol ebx, cl
shrd edx, ebx, cl
test cl, 32 ; Count >= 32?
- cmovnz ecx, eax ; switch eax & edx if Count >= 32
- cmovnz eax, edx
- cmovnz edx, ecx
+ jz @F
+ mov ecx, eax ; switch eax & edx if Count >= 32
+ mov eax, edx
+ mov edx, ecx
+@@:
ret
InternalMathRRotU64 ENDP
Index: Library/BaseLib/Ia32/RRotU64.c
===================================================================
--- Library/BaseLib/Ia32/RRotU64.c (revision 17201)
+++ Library/BaseLib/Ia32/RRotU64.c (working copy)
@@ -1,7 +1,7 @@
/** @file
64-bit right rotation for Ia32
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD
License
which accompanies this distribution. The full text of the license may be
found at
@@ -45,9 +45,11 @@
rol ebx, cl
shrd edx, ebx, cl
test cl, 32 // Count >= 32?
- cmovnz ecx, eax
- cmovnz eax, edx
- cmovnz edx, ecx
+ jz L0
+ mov ecx, eax
+ mov eax, edx
+ mov edx, ecx
+L0:
}
}
Index: Library/BaseLib/Ia32/RRotU64.S
===================================================================
--- Library/BaseLib/Ia32/RRotU64.S (revision 17201)
+++ Library/BaseLib/Ia32/RRotU64.S (working copy)
@@ -1,6 +1,6 @@
#------------------------------------------------------------------------------
#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD
License
# which accompanies this distribution. The full text of the license may be
found at
@@ -39,8 +39,10 @@
roll %cl, %ebx
shrdl %cl, %ebx, %edx
testb $32, %cl # Count >= 32?
- cmovnz %eax, %ecx # switch eax & edx if Count >= 32
- cmovnz %edx, %eax
- cmovnz %ecx, %edx
+ jz L0
+ movl %eax, %ecx # switch eax & edx if Count >= 32
+ movl %edx, %eax
+ movl %ecx, %edx
+L0:
pop %ebx
ret
Index: Library/BaseLib/Ia32/RShiftU64.asm
===================================================================
--- Library/BaseLib/Ia32/RShiftU64.asm (revision 17201)
+++ Library/BaseLib/Ia32/RShiftU64.asm (working copy)
@@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
-; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD
License
; which accompanies this distribution. The full text of the license may be
found at
@@ -36,8 +36,10 @@
xor edx, edx
mov eax, [esp + 8]
test cl, 32 ; Count >= 32?
- cmovz edx, eax
- cmovz eax, [esp + 4]
+ jnz @F
+ mov edx, eax
+ mov eax, [esp + 4]
+@@:
shrd eax, edx, cl
shr edx, cl
ret
Index: Library/BaseLib/Ia32/RShiftU64.c
===================================================================
--- Library/BaseLib/Ia32/RShiftU64.c (revision 17201)
+++ Library/BaseLib/Ia32/RShiftU64.c (working copy)
@@ -1,7 +1,7 @@
/** @file
64-bit logical right shift function for IA-32
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD
License
which accompanies this distribution. The full text of the license may be
found at
@@ -40,8 +40,10 @@
xor edx, edx
mov eax, dword ptr [Operand + 4]
test cl, 32
- cmovz edx, eax
- cmovz eax, dword ptr [Operand + 0]
+ jnz L0
+ mov edx, eax
+ mov eax, dword ptr [Operand + 0]
+L0:
shrd eax, edx, cl
shr edx, cl
}
Index: Library/BaseLib/Ia32/RShiftU64.S
===================================================================
--- Library/BaseLib/Ia32/RShiftU64.S (revision 17201)
+++ Library/BaseLib/Ia32/RShiftU64.S (working copy)
@@ -1,6 +1,6 @@
#------------------------------------------------------------------------------
#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD
License
# which accompanies this distribution. The full text of the license may be
found at
@@ -37,8 +37,10 @@
xorl %edx, %edx
movl 8(%esp), %eax
testb $32, %cl # Count >= 32?
- cmovz %eax, %edx
- cmovz 0x4(%esp), %eax
+ jnz L0
+ movl %eax, %edx
+ movl 0x4(%esp), %eax
+L0:
shrdl %cl, %edx, %eax
shr %cl, %edx
ret
------------------------------------------------------------------------------
One dashboard for servers and applications across Physical-Virtual-Cloud
Widest out-of-the-box monitoring support with 50+ applications
Performance metrics, stats and reports that give you Actionable Insights
Deep dive visibility with transaction tracing using APM Insight.
http://ad.doubleclick.net/ddm/clk/290420510;117567292;y
_______________________________________________
edk2-devel mailing list
edk2-devel@lists.sourceforge.net
https://lists.sourceforge.net/lists/listinfo/edk2-devel