Jeff,

Thanks.  I will fix the commit log.

Mike

From: Fan, Jeff [mailto:jeff....@intel.com]
Sent: Monday, April 27, 2015 12:32 AM
To: edk2-devel@lists.sourceforge.net; Justen, Jordan L
Subject: Re: [edk2] [Patch V2 10/10] Add Quark SoC Compatibility: UefiCpuPkg : 
DebugAgentLib

One typo in commit log: UefiCpuPkg : DebugAgentLib => UefiCpuPkg : 
CpuExceptionHandlerLib

Reviewed-by: Jeff Fan <jeff....@intel.com<mailto:jeff....@intel.com>>

From: Kinney, Michael D [mailto:michael.d.kin...@intel.com]
Sent: Monday, April 27, 2015 1:55 PM
To: edk2-devel@lists.sourceforge.net<mailto:edk2-devel@lists.sourceforge.net>; 
Justen, Jordan L
Subject: [edk2] [Patch V2 10/10] Add Quark SoC Compatibility: UefiCpuPkg : 
DebugAgentLib


Use CPUID Leaf 01 to detect support for debug extensions and FXSAVE/FXRESTOR 
instructions and do not enable those features in CR4 if they are not supported.



Contributed-under: TianoCore Contribution Agreement 1.0

Signed-off by: Michael Kinney 
<michael.d.kin...@intel.com<mailto:michael.d.kin...@intel.com>>



Index: Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf

===================================================================

--- Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf            
(revision 17201)

+++ Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf         
(working copy)

@@ -1,7 +1,7 @@

## @file

#  CPU Exception Handler library instance for DXE modules.

#

-#  Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>

+#  Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved.<BR>

#  This program and the accompanying materials

#  are licensed and made available under the terms and conditions of the BSD 
License

#  which accompanies this distribution.  The full text of the license may be 
found at

@@ -18,7 +18,7 @@

   MODULE_UNI_FILE                = DxeCpuExceptionHandlerLib.uni

   FILE_GUID                      = B6E9835A-EDCF-4748-98A8-27D3C722E02D

   MODULE_TYPE                    = DXE_DRIVER

-  VERSION_STRING                 = 1.0

+  VERSION_STRING                 = 1.1

   LIBRARY_CLASS                  = CpuExceptionHandlerLib|DXE_CORE DXE_DRIVER 
UEFI_APPLICATION



 #

Index: Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.asm

===================================================================

--- Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.asm           
(revision 17201)

+++ Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.asm        (working 
copy)

@@ -1,5 +1,5 @@

;------------------------------------------------------------------------------ 
;

-; Copyright (c) 2012 - 2013, Intel Corporation. All rights reserved.<BR>

+; Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>

; This program and the accompanying materials

; are licensed and made available under the terms and conditions of the BSD 
License

; which accompanies this distribution.  The full text of the license may be 
found at

@@ -250,10 +250,22 @@

     push    eax



 ;; UINT32  Cr0, Cr1, Cr2, Cr3, Cr4;

+    mov     eax, 1

+    push    ebx         ; temporarily save value of ebx on stack

+    cpuid               ; use CPUID to determine if FXSAVE/FXRESTOR and DE

+                        ; are supported

+    pop     ebx         ; retore value of ebx that was overwritten by CPUID

     mov     eax, cr4

-    or      eax, 208h

+    push    eax         ; push cr4 firstly

+    test    edx, BIT24  ; Test for FXSAVE/FXRESTOR support

+    jz      @F

+    or      eax, BIT9   ; Set CR4.OSFXSR

+@@:

+    test    edx, BIT2   ; Test for Debugging Extensions support

+    jz      @F

+    or      eax, BIT3   ; Set CR4.DE

+@@:

     mov     cr4, eax

-    push    eax

     mov     eax, cr3

     push    eax

     mov     eax, cr2

@@ -280,7 +292,11 @@

;; FX_SAVE_STATE_IA32 FxSaveState;

     sub     esp, 512

     mov     edi, esp

+    test    edx, BIT24  ; Test for FXSAVE/FXRESTOR support.

+                        ; edx still contains result from CPUID above

+    jz      @F

     db      0fh, 0aeh, 07h ;fxsave [edi]

+@@:



 ;; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is 
clear

     cld

@@ -307,7 +323,13 @@



 ;; FX_SAVE_STATE_IA32 FxSaveState;

     mov     esi, esp

+    mov     eax, 1

+    cpuid               ; use CPUID to determine if FXSAVE/FXRESTOR

+                        ; are supported

+    test    edx, BIT24  ; Test for FXSAVE/FXRESTOR support

+    jz      @F

     db      0fh, 0aeh, 0eh ; fxrstor [esi]

+@@:

     add     esp, 512



 ;; UINT32  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;

Index: Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.S

===================================================================

--- Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.S (revision 17201)

+++ Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.S              
(working copy)

@@ -1,6 +1,6 @@

#------------------------------------------------------------------------------

#*

-#*   Copyright (c) 2012 - 2013, Intel Corporation. All rights reserved.<BR>

+#*   Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>

#*   This program and the accompanying materials

#*   are licensed and made available under the terms and conditions of the BSD 
License

#*   which accompanies this distribution.  The full text of the license may be 
found at

@@ -447,10 +447,25 @@

     pushl   %eax



 #; UINT32  Cr0, Cr1, Cr2, Cr3, Cr4;

+## insure FXSAVE/FXRSTOR is enabled in CR4...

+## ... while we're at it, make sure DE is also enabled...

+    mov     $1, %eax

+    pushl   %ebx                         # temporarily save value of ebx on 
stack

+    cpuid                                # use CPUID to determine if 
FXSAVE/FXRESTOR

+                                         # and DE are supported

+    popl    %ebx                         # retore value of ebx that was 
overwritten

+                                         # by CPUID

     movl    %cr4, %eax

-    orl     $0x208, %eax

+    pushl   %eax                         # push cr4 firstly

+    testl   $BIT24, %edx                 # Test for FXSAVE/FXRESTOR support

+    jz      L1

+    orl     $BIT9, %eax                  # Set CR4.OSFXSR

+L1:

+    testl   $BIT2, %edx                  # Test for Debugging Extensions 
support

+    jz      L2

+    orl     $BIT3, %eax                  # Set CR4.DE

+L2:

     movl    %eax, %cr4

-    pushl   %eax

     movl    %cr3, %eax

     pushl   %eax

     movl    %cr2, %eax

@@ -477,7 +492,11 @@

#; FX_SAVE_STATE_IA32 FxSaveState;

     subl    $512, %esp

     movl    %esp, %edi

+    testl   $BIT24, %edx     # Test for FXSAVE/FXRESTOR support.

+                             # edx still contains result from CPUID above

+    jz      L3

     .byte      0x0f, 0x0ae, 0x07 #fxsave [edi]

+L3:



 #; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is 
clear

     cld

@@ -503,7 +522,13 @@



 #; FX_SAVE_STATE_IA32 FxSaveState;

     movl    %esp, %esi

+    movl    $1, %eax

+    cpuid                    # use CPUID to determine if FXSAVE/FXRESTOR

+                             # are supported

+    testl   $BIT24, %edx     # Test for FXSAVE/FXRESTOR support

+    jz      L4

     .byte      0x0f, 0x0ae, 0x0e # fxrstor [esi]

+L4:

     addl    $512, %esp



 #; UINT32  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;

Index: Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf

===================================================================

--- Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf       
(revision 17201)

+++ Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf     
(working copy)

@@ -1,7 +1,7 @@

## @file

#  CPU Exception Handler library instance for SEC/PEI modules.

#

-#  Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved.<BR>

+#  Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>

#  This program and the accompanying materials

#  are licensed and made available under the terms and conditions of the BSD 
License

#  which accompanies this distribution.  The full text of the license may be 
found at

@@ -18,7 +18,7 @@

   MODULE_UNI_FILE                = SecPeiCpuExceptionHandlerLib.uni

   FILE_GUID                      = CA4BBC99-DFC6-4234-B553-8B6586B7B113

   MODULE_TYPE                    = PEIM

-  VERSION_STRING                 = 1.0

+  VERSION_STRING                 = 1.1

   LIBRARY_CLASS                  = CpuExceptionHandlerLib|SEC PEI_CORE PEIM



 #

Index: Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf

===================================================================

--- Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf          
(revision 17201)

+++ Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf       (working 
copy)

@@ -1,7 +1,7 @@

## @file

#  CPU Exception Handler library instance for SMM modules.

#

-#  Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>

+#  Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved.<BR>

#  This program and the accompanying materials

#  are licensed and made available under the terms and conditions of the BSD 
License

#  which accompanies this distribution.  The full text of the license may be 
found at

@@ -18,7 +18,7 @@

   MODULE_UNI_FILE                = SmmCpuExceptionHandlerLib.uni

   FILE_GUID                      = 8D2C439B-3981-42ff-9CE5-1B50ECA502D6

   MODULE_TYPE                    = DXE_SMM_DRIVER

-  VERSION_STRING                 = 1.0

+  VERSION_STRING                 = 1.1

   LIBRARY_CLASS                  = CpuExceptionHandlerLib|DXE_SMM_DRIVER



 #
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