Thanks Eugene! Few more doubts:
(1) What exactly this "case EfiPciHostBridgeAllocateResources" of NotifyPhase does? (2) In "StartBusEnumeration" function of PCI_HOST_BRIDGE, it / Fill an ACPI descriptor table with the Bus Number Range. This information will be used by the PCI Bus driver // to set bus numbers to PCI-to-PCI bridge. Is PCI bus implementation is ACPI based only? (3) The PCI controller i am programming, does iATU (Internal address translation unit) programming for accessing PCI IO, Mem and config space. When this programming should happen? During RootBridge init time? (4) The RootBridge protocol functions like : PciIoRead/PciIoWrite, PciMemRead/PciMemWrite, PciPciRead/PciPciWrite They all use MmioRead/MmioWrite internally. Also PCI controller registers are already memory mapped. So what is the significance of: "Reading/Writing PCI controller registers in the PCI root bridge I/O space" "Reading/Writing PCI controller registers in the PCI root bridge Memory space" "Reading/Writing PCI controller registers in the PCI root bridge Configuration space" Thanks and Regards, Shaveta From: Cohen, Eugene [mailto:eug...@hp.com] Sent: Tuesday, June 02, 2015 7:20 PM To: edk2-devel@lists.sourceforge.net Cc: olivier.mar...@arm.com Subject: Re: [edk2] Query UEFI : PCIE Driver for Armv8 platform ? Is all of the following functions have platform specific code, or they can be re-used from any of the PCI code like ARmJunoPkg etc? Are all these functions definitions mendatory? You have to implement the host bridge and root bridge protocols. When you implement a protocol you must implement the functions. Some of the functions don't have to do anything (like some of the NotifyPhase case statements). ? Should "PCI bus scan for devices" kind of code be written as part of PCI Root Bridge code or it should be re-used from ? MdeModulePkg/Bus/Pci/ code as it is? The PCI bus driver already does a scan and enumeration. All you need to do is support the root/host bridge (provide config cycle generation, provide address ranges for mapping into memory spaces, etc). From: Leekha Shaveta [mailto:shav...@freescale.com] Sent: Tuesday, June 02, 2015 1:20 AM To: edk2-devel@lists.sourceforge.net<mailto:edk2-devel@lists.sourceforge.net> Cc: olivier.mar...@arm.com<mailto:olivier.mar...@arm.com> Subject: Re: [edk2] Query UEFI : PCIE Driver for Armv8 platform Hi, I am writing a PCI driver(Host Bridge) code for ARM platform with real devices like e1000 NIC card on PCI bus. I have written a part of PCI Root Complex Initialization code, but have few doubts : (1) Is all of the following functions have platform specific code, or they can be re-used from any of the PCI code like ARmJunoPkg etc? Are all these functions definitions mendatory? * PciHbRaNotifyPhase, // ResAlloc.NotifyPhase * PciHbRaGetNextRootBridge, // ResAlloc.GetNextRootBridge * PciHbRaGetAllocAttributes, // ResAlloc.GetAllocAttributes * PciHbRaStartBusEnumeration, // ResAlloc.StartBusEnumeration * PciHbRaSetBusNumbers, // ResAlloc.SetBusNumbers * PciHbRaSubmitResources, // ResAlloc.SubmitResources * PciHbRaGetProposedResources, // ResAlloc.GetProposedResources * PciHbRaPreprocessController (2) Should "PCI bus scan for devices" kind of code be written as part of PCI Root Bridge code or it should be re-used from MdeModulePkg/Bus/Pci/ code as it is? (3) As I want to write e1000 PCI NIC card driver over it, is there any existing code for the same? Thanks and Regards, Shaveta From: Sharma Bhupesh-B45370 Sent: Wednesday, May 13, 2015 8:20 PM To: edk2-devel@lists.sourceforge.net<mailto:edk2-devel@lists.sourceforge.net> Cc: Leekha Shaveta-B20052 Subject: RE: Query UEFI : PCIE Driver for Armv8 platform Thanks for the pointers, Olivier. Regards, Bhupesh From: Olivier Martin [mailto:olivier.mar...@arm.com] Sent: Wednesday, May 13, 2015 8:10 PM To: edk2-devel@lists.sourceforge.net<mailto:edk2-devel@lists.sourceforge.net> Subject: Re: [edk2] Query UEFI : PCIE Driver for Armv8 platform Are lucky because I actually pushed the PCI Root Complex source code for ARM Juno development board R1 (Revision 1) yesterday in EDK2. You should be able to find the code under ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe I am guessing what you name 'ATU' is the logic to translate AXI bus <-> PCI bus. As far as I have seen so far, this logic is vendor specific. You can see this initialization of the translation block for this PCI Root Complex in this file: ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/XPressRich3.c From: Leekha Shaveta [mailto:shav...@freescale.com] Sent: 13 May 2015 13:09 To: edk2-devel@lists.sourceforge.net<mailto:edk2-devel@lists.sourceforge.net> Subject: [edk2] Query UEFI : PCIE Driver for Armv8 platform Hi, I was looking for PCIE driver/Root Bridge implementation for ARMv8 kind of platforms and have referred some code in files: * ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciRootBridgeIo.c * ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.c But I couldn't see ATU programming code in this implementation, AFAIK ATU programming is required for any outbound and inbound transaction of PCI. How the IO translation is being done in this? Also what is the context of "aperture" used in this code? Kindly help in clearing these doubts. Regards, Shaveta -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2557590 ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2548782
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