On 06/09/15 01:30, Paulo Alcantara wrote: > On Tue, 09 Jun 2015 01:09:19 +0200 > Laszlo Ersek <ler...@redhat.com> wrote: > >> On 06/09/15 00:49, Jordan Justen wrote: >>> On 2015-06-08 15:07:13, Paulo Alcantara wrote: >>>> This patch initialises root complex register block BAR in order to >>>> support TCO watchdog emulation features (e.g. reboot upon >>>> NO_REBOOT bit not set) on QEMU. >>>> >>>> Contributed-under: TianoCore Contribution Agreement 1.0 >>>> Signed-off-by: Paulo Alcantara <pca...@zytor.com> >>>> --- >>>> OvmfPkg/Include/IndustryStandard/Q35MchIch9.h | 5 +++++ >>>> OvmfPkg/PlatformPei/Platform.c | 14 +++++++++++++- >>>> 2 files changed, 18 insertions(+), 1 deletion(-) >>>> >>>> diff --git a/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h >>>> b/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h index >>>> 4f59a7c..18b34a3 100644 --- >>>> a/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h +++ >>>> b/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h @@ -77,6 +77,9 @@ >>>> #define ICH9_GEN_PMCON_1 0xA0 >>>> #define ICH9_GEN_PMCON_1_SMI_LOCK BIT4 >>>> >>>> +#define ICH9_RCBA 0xF0 >>>> +#define ICH9_RCBA_EN BIT0 >>>> + >>>> // >>>> // IO ports >>>> // >>>> @@ -90,4 +93,6 @@ >>>> #define ICH9_SMI_EN_APMC_EN BIT5 >>>> #define ICH9_SMI_EN_GBL_SMI_EN BIT0 >>>> >>>> +#define ICH9_ROOT_COMPLEX_BASE 0xFED1C000 >>>> + >>>> #endif >>>> diff --git a/OvmfPkg/PlatformPei/Platform.c >>>> b/OvmfPkg/PlatformPei/Platform.c index 1126c65..3811162 100644 >>>> --- a/OvmfPkg/PlatformPei/Platform.c >>>> +++ b/OvmfPkg/PlatformPei/Platform.c >>>> @@ -212,13 +212,16 @@ MemMapInitialization ( >>>> // 0xFEC00000 IO-APIC 4 KB >>>> // 0xFEC01000 gap 1020 KB >>>> // 0xFED00000 HPET 1 KB >>>> - // 0xFED00400 gap 1023 KB >>>> + // 0xFED00400 gap 111 KB >>>> + // 0xFED1C000 RCRB 16 KB >>> >>> Should we make this conditional? >>> // 0xFED1C000 gap (PIIX4) / RCRB (ICH9) 16 KB >>> >>> ... and make mHostBridgeDevId a global var, and then conditionally >>> add the memory io HOB? >> >> Good point. > > Good point, indeed. Unlike HPET, I/O APIC and other addresses that will > be shared between PIIX4 and ICH9, the RCRB will be exclusive to ICH9. I > can make these changes on top this patch, or do you guys prefer it to > be placed in another?
I think mHostBridgeDevId should be made an extern in the first patch, and then the second patch could be this one, also including the conditional stuff in MemMapInitialization(). Thanks Laszlo ------------------------------------------------------------------------------ _______________________________________________ edk2-devel mailing list edk2-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/edk2-devel
