Hi Andrew
My answers inline
From: Andrew Fish [mailto:af...@apple.com]
Sent: 22 June 2015 07:35
To: edk2-devel@lists.sourceforge.net
Cc: Subramanian Karunanithi (sukaruna)
Subject: Re: [edk2] How to fix (CPU address space) upper address in EDKII
On Jun 22, 2015, at 12:09 AM, Jeyaraman Sundararajan (jeysunda)
<jeysu...@cisco.com<mailto:jeysu...@cisco.com>> wrote:
Hi
We have a requirement to fix the reset vector code at FFFE_FFFF instead of the
default FFFF_FFFF. How to set the upper address in build tools so that all
SEC/PEI modules will be relocated based on the new Top of address.
If this is x86, is your reset vector really at 0xFFFEFFF0? Or is you chipset
inverting an address bit?
[Jey] We have a non-BIOS code at 0xFFFF_FFFF which will execute first then
it’ll give control to BIOS reset vector code that we want to place it at
0xFFFE_FFFF
1) The question you asked the reset vector is @ 0xFFFEFFF0
You just move the FV with the SEC so that it ends @ 0xFFFEFFFF.
The SEC has a “magic” file name GUID, call volume top, and the tools will
always pack this file at the very end of the FV.
[Jey] I know about VTF file but in for our case if move the SEC FV ends @
0xFFFEFFF, the build tool is not able to fix the BFV Base address, AP entry
point & SEC __MoudleEntryPoint where are present at 16 bytes of final image. Do
you know any configuration has to be added(in *.fdf or in any other file) to
fake the build tool to assume the top of address is 0xFFFE_FFFF.
2) If you chipset is inverting BIT16, but expecting the reset vector to be
0xFFFEFFF0
The edk2 build system does not support this kind of TopSwap.
What you do is:
Map the FV with the SEC from 0xFFFF0000 - 0xFFFFFFFF.
Have a fake region from 0xFFFE0000 - 0xFFEFFFF in the FD flash map.
Use a post processing tool to patch the value of the last 64K of the FD into
the previous 64K.
Thanks,
Andrew Fish
Thanks
Jeyaram
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