The “Rev” that is silkscreened on the board reflects the revision level of the bare board, NOT the assembly revision level of the module which will reflect changes made to the module and could any component, hardware, or circuit changes. The module revision level should be reflected on an attached label, written on the pwb (i.e. “ASSY C2”) in a conspicuous location, or not(?).
Ben W4SC Sent from Mail for Windows 10 ______________________________________________________________ Elecraft mailing list Home: http://mailman.qth.net/mailman/listinfo/elecraft Help: http://mailman.qth.net/mmfaq.htm Post: mailto:Elecraft@mailman.qth.net This list hosted by: http://www.qsl.net Please help support this email list: http://www.qsl.net/donate.html Message delivered to arch...@mail-archive.com
