Hi, I get used to using LTSpice for a couple weeks. Currently, I am on the process of design and simulation SRAM 6T. I don't know how to plot butterfly graph to measure Static Noise Margin of the SRAM 6T cell.
May anybody help me solve the problem. Thank you in advanced, Hspice -- You received this message because you are subscribed to the Google Groups "Electric VLSI Editor" group. To post to this group, send email to [email protected]. To unsubscribe from this group, send email to [email protected]. For more options, visit this group at http://groups.google.com/group/electricvlsi?hl=en.
