On Sat, Jun 8, 2013 at 9:58 AM, Usama Awais <[email protected]>wrote:
> Hi everyone, > > I was using Electric with LT SPICE for designing a flash ADC and had a few > queries. These issues have been disturbing me for quite a while! and > hindering my work. > > Does changing the process alter device parameters as in the models being > used or is the process and device model file completely independent of each > other? > > Of course they do: for example compare the value of vth0 given in 180nm and 90nm files. All these makes design process challenging at lower tech nodes. > > Does Changing the technology scale/process alter W/L ratios etc? > >Well, in analog design they do change. See cmos circuit design book by Prof. Baker. He has nice examples on short and long channel design. > > Lastly I would like to mention that I have 4 files, 180nm_bulk.mod.pm, > 90nm_bulk.mod.pm (arizona state predictive technology model), scmos25.mod > and user_append.spi. I know the user_append.spi is used and needed to give > the circuit a stimulus. I even know that 180nm and 90nm files are separate > pm (parameter files). I cannot figure out what scmos25.mod is since its > contents vary slightly from the 90nm and 180nm file. While generating a > SPICE deck we give 2 files scmos25.mod as the header card and > user_append.spi as the footer card inElectric VLSI Design system > preferences. What I dont get is the difference between scmos25 and either > of the 180nm and 90nm files. How do we define what model is being followed > in LTSPICE while generating a SPICE deck from Electric VLSI tool. Does > setting the technology scale predefines it (on the other hand my technology > scale in electric is 125nm). > > Look, 90nm and 180nm technologies corresponds to minimum channel length available in those technologies. You select your technology in which you want chip to fabricated and use model corresponding to them. If you select 90nm node, use 90nm models. In fact, designer perhaps uses tech files supplied by fab which contain these model information besides the design rules for layout. similarly, scmos25.mod that you downloaded from somewhere is a different model. I am curious about user_append.spi . Before I try to answer, tell me how did you get it in electric? This whole bunch of stuff is all mixed up and confused. I am also attaching > these files for reference.I would be happy for clarification. > > Regards > Usama Awais > > -- > You received this message because you are subscribed to the Google Groups > "Electric VLSI Editor" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to [email protected]. > For more options, visit https://groups.google.com/groups/opt_out. > > > -- Best Regards, *MOHAMMAD A MAKTOOMI,* *PhD candidate, ECE* *IIIT-D, **INDIA.* *www.maktoomi.blogspot.com http://iiitdelectronics.blogspot.in/ * *Contact- **+91-* 97 18 140152 "If you want the love of people, stop running after it. The more you chase it, the more it escapes you. Love doesn't come from the people, it comes from Allah". -- You received this message because you are subscribed to the Google Groups "Electric VLSI Editor" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/groups/opt_out.
