Thanku u for ur reply .. On Tue, Feb 10, 2015 at 5:15 PM, Gavin Abo <[email protected]> wrote:
> I'm not familiar with the GDI technique. However, it looks to me that a > basic GDI cell is just a circuit with one NMOS and one PMOS transistor > where the gates of both the NMOS and PMOS are connected together to create > an input G terminal, the source and drain of the NMOS are connected > together to create an input terminal N, the source and drain of the PMOS > are connected together to create an input terminal P, and the bodies of the > NMOS and PMOS are connected together to create an output D terminal. > > On the cmosedu website, you should be able to find in the tutorials how to > layout a 4-terminal NMOS and PMOS transistor having a gate, source, drain, > and body [ http://cmosedu.com/videos/electric/electric_videos.htm ]. > > So yes, I think you can create a layout and circuit schematic in Electric. > > However, there might be one limitation. I have read in articles like [1] > that not all the functions are possible with standard CMOS process and that > GDI circuits need the Twin-Well CMOS or the SOI (silicon on insulator) > process. The circuit components in Electric are expected to be those for > the standard CMOS process. So if you are just doing this for a class, a > simulation result showing that the circuit works or does not work as > expected might be good enough for you. On the other hand, if you are doing > this for practical application, it might not be possible to get the > simulation result that you would want for realistic devices as that might > require you to adjust parameters (and possibly code) to account for any > differences in the component models that might exist between the different > processes. Though, that is something you would have to do more research > into. > > I hope that helps and good luck. > > [1] Pooja Verma and Rachna Manchanda, "Review Of Various GDI Techniques > For Low Power Digital Circuits", International Journal of Emerging > Technology and Advanced Engineering, vol. 4, p. 387, 2014. > http://www.ijetae.com/files/Volume4Issue2/IJETAE_0214_64.pdf > > > On 2/10/2015 8:56 AM, nithya.malani wrote: > >> can we use GDI (gate diffusion input) technique in Electric software. >> > > -- > You received this message because you are subscribed to the Google Groups > "Electric VLSI Editor" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to [email protected]. > For more options, visit https://groups.google.com/d/optout. > -- You received this message because you are subscribed to the Google Groups "Electric VLSI Editor" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
