Thank you for the answer Gavin. On Friday, 10 April 2015 11:12:38 UTC-5, Gavin wrote: > > Yes, you should be able to say that Electric's mocmos technology is a > standard scalable cmos technology. > > However, keep in mind that the mocmos design rules are only known to > work for layouts that will use cmos processes between 1.5 micron and 180 > nm as it says in section 1.1 of the document that defines the official > MOSIS scalable cmos (SCMOS) layout rules: > > https://www.mosis.com/files/scmos/scmos.pdf > > So for layouts that will use cmos processes below 180 nm, you would need > to adhere instead to the vendor rules [ > https://www.mosis.com/pages/design/rules ]. > > On 4/9/2015 10:44 PM, Gunasekhar Aluru wrote: > > If i do a layout design in Electric with mocmos technology can is say > > that it is layout design for standard scalable cmos technoogy ? > > > > If not are the design rules varies with mocmos deign rules? and what > > is actual cmos technology? > > > > In Mosis design rules it clearly says that the design rules are for > > design which are fabricated through mosis and when i search for cmos > > technology rules many universites provide mosis scalable design rules. > > > > Even in this paper it is mentioned as scable cmos technology but not > > mocmos > > technology.( > http://www.ijeee.net/uploadfile/2014/0507/20140507041952134.pdf > > ) . >
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