The names "resnwell@0" and "resnwell@1" are the names of the resistors.
Give your resistors names if you want something more sensible in the
Spice deck.
As for the internal net, "net@19", my best guess is that your circuit
isn't fully connected. Check that clicking on a node highlights all of
the other nodes that it's supposed to connect to.
-Steven Rubin
On 10/27/2016 9:28 AM, Sunjaya Djaja wrote:
Dear sir/madam,
I have a schematic of a resistor divider like this:
-------vin--------/\/\/\/\------------------vout
|
|
\
/
\
/
|
|
gnd
|
|
When I used Tools -> Simulation (Spice) -> Write Spice Deck
I obtained the following:
*** TOP LEVEL CELL: R_divider{sch}
Rresnwell@0 resnwell@0_b net@19 10k
Rresnwell@1 vin gnd 10k
* Spice Code nodes in cell cell 'R_divider{sch}'
vin vin 0 DC 1
.tran 0 1
.END
So I would expect vin, vout and gnd in my spice deck and instead
I have resnwell@0_b and net@19.
Can somebody point out what I am doing wrong?
Thank you
Sun
--
You received this message because you are subscribed to the Google
Groups "Electric VLSI Editor" group.
To unsubscribe from this group and stop receiving emails from it, send
an email to electricvlsi+unsubscr...@googlegroups.com
<mailto:electricvlsi+unsubscr...@googlegroups.com>.
For more options, visit https://groups.google.com/d/optout.
--
You received this message because you are subscribed to the Google Groups "Electric
VLSI Editor" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to electricvlsi+unsubscr...@googlegroups.com.
For more options, visit https://groups.google.com/d/optout.