Thanks a lot for the reply Ruben & Gavin. I will try your suggestions. On Mon, Jun 7, 2021 at 7:48 PM Steven Rubin <[email protected]> wrote:
> Here is what Electric can do about the problem of incorrectly-sized > transistors. First, you must select all the transistors in a cell. This can > be done by selecting one of them, then using the "select all like this" > command to spread the selection to every other transistor. Then, as you've > acknowledged, the "Get Info" command can handle bulk changes to the size of > every transistor. You may also have to select the arcs (wires) and resize > them in the same way. > > As far as handling new DRC errors, it may be possible to use the > compaction tool, because it has the option of "spreading" instead of > compacting to satisfy design rules. This tool is rarely used and may cause > other issues, but at least you can try it. The best way forward when > correcting these issues is to use Electric's constraint system that keeps > wires looking relatively nice when changes are made. Also note that when > you are dragging something, Electric does a quick DRC check and advises you > as the the distances left and rules that are being considered. Not every > rule is used in this, but it's a start. > > At the end of the day, keep in mind that Electric is a graphical tool for > custom layout, but most people use hardware description languages these > days, and the HDLs always generate proper DRC results. A graphical, > interactive, non-text-based system is never going to make that promise. > > -Steven Rubin > On 6/7/2021 4:35 AM, Gavin Abo wrote: > > I don't think I have ever seen that done in an automated way. So the > answer is probably that is current not possible to do that. Though, you > can have a look at the Electric user's guide to see if the functionality to > do that is described in there in case I overlooked it. > > If your lambda rules are still fine and it is just a matter of you scaling > the real unit, you may be able to change that with scale. Refer to: > https://www.staticfreesoft.com/jmanual/mchap07-02-01.html > https://www.staticfreesoft.com/jmanual/mchap07-02-02.html > > You may also be able to scale by changing the old technology to new one as > explained at: > > https://www.staticfreesoft.com/jmanual/mchap08-08.html > > However, you may have to ignore or update your DRC rules for the new > technology as explained at: > > https://www.staticfreesoft.com/jmanual/mchap09-02-02.html > > > [1] https://www.staticfreesoft.com/jmanual/index.html > On 6/6/2021 11:37 PM, Bibin Paul wrote: > > Hi, > > I saw all the videos, my question is not just changing the sizes, which > I could do with ctrl I. But how to avoid re-layout in an automated way > when transistor size changes without re-drc and optminal area ( assuming > the first layout was area optimal) > > Regards, > Bibin > > On Sun, 6 Jun 2021, 10:43 pm Gavin Abo, <[email protected]> wrote: > >> I could be wrong as it been quite some time since I did an Electric >> layout, but I thought one (or more) of the tutorials at [1] went over >> changing the wire sizes (e.g., metal, poly) and transistor sizes in the >> layout. It might have been tutorial 3. Have you went through the >> tutorials to see if your questions were answered in one of them? >> >> [1] http://cmosedu.com/videos/electric/electric_videos.htm >> >> On 6/5/2021 10:11 PM, student_learner wrote: >> > Hi, >> > >> > I did a complete electric layout and now i noticed that component >> > sizes picked were wrong. >> > >> > I tried changing the size of transistor in the existing layout, >> > however, I noticed that layout is now tampered and getting new DRC's >> > and area is also not optimal. Please let me know if there is any >> > automatic way of updating components sizes/wires in a existing >> > layout(which is completed) without needing to re-do the same manual >> > layout. >> > >> > Regards, >> > Bibin >> > -- > You received this message because you are subscribed to the Google Groups > "Electric VLSI Editor" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to [email protected]. > To view this discussion on the web visit > https://groups.google.com/d/msgid/electricvlsi/11f11787-3ba6-d75d-e5c3-ca99296f0953%40gmail.com > <https://groups.google.com/d/msgid/electricvlsi/11f11787-3ba6-d75d-e5c3-ca99296f0953%40gmail.com?utm_medium=email&utm_source=footer> > . > > -- > You received this message because you are subscribed to the Google Groups > "Electric VLSI Editor" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to [email protected]. > To view this discussion on the web visit > https://groups.google.com/d/msgid/electricvlsi/2c7d9e03-5dff-2760-b38d-49143382cef5%40staticfreesoft.com > <https://groups.google.com/d/msgid/electricvlsi/2c7d9e03-5dff-2760-b38d-49143382cef5%40staticfreesoft.com?utm_medium=email&utm_source=footer> > . > -- Regards, Bibin -- You received this message because you are subscribed to the Google Groups "Electric VLSI Editor" group. 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