David, there is complete description of the termination and voltage rules for implementation of DDR3 and DDR3L memories provided by micron:
http://www.micron.com/~/media/Documents/Products/Technical%20Note/DRAM/tn4113_ddr3_point_to_point_design.pdf in addition, design details for Baytrail-I based platforms can be found here: http://www.intel.com/content/www/us/en/intelligent-systems/bay-trail/atom-processor-e3800-family-overview.html Dave > On November 4, 2014 at 4:46 AM David Vrtaric <[email protected]> > wrote: > > > Hi MinnowMaxBoard, > We ordered the minnowmaxboard on mouser, and we are trying to create a board > similar to minnow board.And I have a question for the ddr3l connection to SoC, > specific the termination resistors on sheet 13 in the schematic downloaded > from wiki, why are they necessary and I see they are connected to VDIMM_VTT , > what is the voltage of VDIMM_VTT? And about the caps connected between > VDIMM_VTT and GND what are they for? > Best Regards. > _______________________________________________ > elinux-MinnowBoard mailing list > [email protected] > http://lists.elinux.org/mailman/listinfo/elinux-minnowboard _______________________________________________ elinux-MinnowBoard mailing list [email protected] http://lists.elinux.org/mailman/listinfo/elinux-minnowboard
