Dave Engvall <[EMAIL PROTECTED]> wrote: > I keep wondering if there is enough room in the 5I20 to do two servo > channels plus an extra dac and an adc? > Or even 3 channels plus the dac and adc; it never hurts to dream. ;-)
Its not really "two servo channels, a dac, and an adc". Its "two encoder counters, three dacs, and an adc". In other words, its just I/O devices, be they counters, dacs, whatever. You determined what is a channel by how you hook them up in HAL. Since the stock config provides 4 encoder counters and 4 dacs, you are already most of the way there. The ADC is the sticking point. The 5i20 has _no_ analog capability at all, its strictly a digital chip. It does its "DACs" by generating a high frequency PWM signal and then filtering and buffering that with an op-amp circuit on the interface card. Unfortunately that approch doesn't lend itself to A/D circuits. There are a couple of approaches. One that can be quite cheap but is rather slow, is to take the fourth DAC channel and run it to a comparitor along with the analog input, then bring the output of the comparitor back thru a spare digital input. It would be easy to write a HAL module that would increase or decrease the DAC output so it tracks the analog input. (In fact, you could probably do it using some of the existing HAL modules - an integrator driving the DAC, with the integrator input coming from a mux2. Connect the signal from the comparitor to the mux select input, and set the mux inputs to +1 and -1 so the integrator ramps either up or down depending on the comparitor setting. That approach is only suitable for very slow signals. If better performance is needed, a real (analog) A/D converter is the way to go. It could be connected using a bunch of the spare inputs (for a parallel interface A/D) or just a few (for a serial one). I'm planning to go the serial route, with serial to parallel conversion in the FPGA. I haven't picked out the A/D converter I'm going to use yet, there are plenty of choices though. For my application, I want several kHz sampling, on three channels, with at least two of them sampling simultaneously. There are some simple and cheap ($4) serial 12-bit serial A/Ds from Analog devices. I'm considering just hooking up three of those, with a common clock and chip-select/start-conversion line, and three data lines back to the FPGA. An alternative is a single more expensive ADC chip with multiple channels. That could use fewer I/O pins, but getting the simultaneous sampling is a little tougher. All of this is a few weeks (or months) down the road, I have other things I need to do first. But whatever I come up with will be made public under the GPL (FPGA configuration and HAL driver). Regards, John Kasunich ------------------------------------------------------------------------- Take Surveys. Earn Cash. Influence the Future of IT Join SourceForge.net's Techsay panel and you'll get the chance to share your opinions on IT & business topics through brief surveys - and earn cash http://www.techsay.com/default.php?page=join.php&p=sourceforge&CID=DEVDEV _______________________________________________ Emc-developers mailing list Emc-developers@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/emc-developers
