Please feel free to ream the code -- I didn't have any familiarity with
the hm2 driver going in, so I'm sure I got things wrong.  I'd sure take
your understanding over mine when it comes to the memory allocation
issue.  Here's the part where I think I started to go off the rails: I 
added a call which sets up encoder.control_reg as a tram read region.  I
think I intended to get rid of the kmalloc of the same memory region,
but obviously I didn't.

As for the actual workings of the encoder index, the register needs to
be read at least when index-enable is true in HAL, so that emc can react
on the cycle that the fpga clears the bit to indicate that an index was
seen.  It needs to be written whenever index-enable goes true in HAL, or
when the other bits change--but index-enable is the only one normally
changing during machine operation.

So on the one hand it's not something like a prescaler register that is
generally only used in startup code, and the most straightforward thing
to do is just read it all the time.  On the other hand, not everybody
will actually use the index with every encoder.

So I guess the question becomes whether it's better to make everyone pay
for an additional 32-bit read for every encoder every cycle, or to make
those who use index pay for an additional 32-bit read and an address
cycle (I think?) when index is actually enabled.  Again, you have the
expertise here so I'm happy to let you make the call. (it's probably not
a big consideration on 5i20 anyway..)

I hope you are able to salvage something from this work I did.

Jeff

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