Andreas Strecker wrote: > Hello > The EPP Standard should be able to drive 2 Megabytes/s, so 2 MHz > should be the limit, 200KHz ? > Well, try it! About the best I can do is something like 640 ns per byte. Also, the way program I/O EPP works is it puts the CPU in a wait state until the port operation is done. Your xxx GHz CPU suddenly slows down to parallel port speed, like 1000 : 1! The 640 ns is with a short cable, and minimum deskew delays in the external device. > So my suggestion: Program a hybrid of Interrupts and Polling. This is essentially how Mach works. If a pulse is needed between the interrupt ticks, the program busy-loops until the right time, then issues the pulse. Brilliant, but a big waste of CPU time. > Calculate the exact optimal absolute Time point for every Output Step > for individual axis. > Sort the Time points of all axis. > Decide if it makes sense to have an Interrupt between two Steps > depending on simple Delta-Time. > Program the Interrupt Timer with the desired next Output Time point > minus the maximum Latency. > Poll the HW-Timer until the Output Time point is reached and Fire the > Parport. > Poll the HW Timer if next Output Time Point is near, otherwise return > and wait for next Interrupt. > EMC2 is based on regularly-scheduled interrupts. I suspect RTAI can do other types of interrupts, but haven't looked into it.
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