On Thu, 1 Apr 2010, Slavko Kocjancic wrote: > Date: Thu, 01 Apr 2010 10:25:24 +0200 > From: Slavko Kocjancic <esla...@gmail.com> > Reply-To: EMC developers <emc-developers@lists.sourceforge.net> > To: EMC developers <emc-developers@lists.sourceforge.net> > Subject: [Emc-developers] EPP timeout > > Hello... > > As I have near finished driver for EPP boards I have one problem. As computer > is common staretd with CNC machine off the EPP board respond to al IO with > timeout. EPP timeout is aprox 10uSec. So if I wan't to write 5 bytes that can > least over 50uSec. And in that case the computer freeze. The solution seems > to be to check EPP timeout after every IO. That's works but make big > overhead. On my EPP board (sem's to be slowest one) the fastest cycle is 2uS > long. The timeout is on aprox 11uS. But the read from status port (to check > timeout) least 1.5uS. So if I get that approach then I have (for 3/3 byte IO) > 6 x 2.0uS 12uS for real IO > 6 x 1.5uS 9uS overhead to check Timeout > total 21uS and system got little slower already > > Then I realize that checking how long in/out can be faster. > So if write_board routine take more than predetermined time to execute then > execution shall be aborted and checked what's realy wrong. > > maybe the best way is to check if out/inp routine take more than 5uS. If is > more then probably is something wrong. > > in write_board there is argument PERIOD. I can't find what is this. Time ?!? > > I have only RDTSC instruction in mind but afraid to use as can be dissabled > (privileged) > > Can someone help?? > > > > And here is working (but unfinished) driver hal_eppport.c > > > EPP timeout is per single byte transfer. You should not get a timeout error regardless of how long a burst of transfers lasts. If you are getting EPP timeouts, I would check your hardwares handshaking. Also good to notice the difference between EPP1.7 and EPP1.9
Peter Wallace Mesa Electronics ------------------------------------------------------------------------------ Download Intel® Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev _______________________________________________ Emc-developers mailing list Emc-developers@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/emc-developers
