I am planning to merge the bldc-hall and bldc-sine components into one
generic driver. The idea is that you will tell the driver what
feedback mechanisms you have (or, actually, which ones you wish to
use) and the driver will attempt to produce the best drive mode it can
from that feedback.

I have tabulated the options here:
https://spreadsheets.google.com/ccc?key=0AhjJW1-T6n7CdG5xeE10X1lLa042YmdWX2pvV00ydGc&hl=en#gid=0

I am thinking that further bitfield-options could choose between
3-output (U, V, W) and 6-output (U, /U, V, /V, W, /W) PWM amplitude
values or 3-wire and 6-wire bit level values.
It might even be possible to have base-thread functions in the latter
modes that perform PWM on the bit values. However I suspect that that
would struggle to manage more than a few kHz and so might not be very
useful, especially as I can't think of many situations where you would
use software PWM and have 6 wires available.

Any thoughts? One thing I am considering is a bit-field to indicate if
the driver should use the user-supplied encoder offset, or should
measure it itself. There is a definite ambiguity about the Type12
arrangement in that table without that information.

-- 
atp

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