Taking this discussion from IRC to email, as requested by Michael...
In the master branch, and in 2.5 and all earlier releases of LinuxCNC,
all HAL threads obey this invariant: short-period threads (ie, the base
thread) are never interrupted by longer-period threads (ie, the servo
thread).
We provide this invariant in our realtime threads by using RTAI, which
implements rate-monotonic scheduling:
http://en.wikipedia.org/wiki/Rate-monotonic_scheduling
We provide this invariant in our "sim flavor" by using libpth (GNU
Portable Threads), which is non-preemptive (so long threads dp not
preempt short threads).
The ubc branch changes the scheduling behavior of threads in the 'posix'
flavor, which is most similar to 'sim builds' in master and earlier.
The posix flavor does not match our invariant.
In ubc's posix flavor, hal threads are implemented by posix threads,
which by default do not provide any scheduling invariants. This means
scheduling is unpredictable, and shorter-period threads can be
interrupted by longer-period threads.
(Now that i think about it, ubc has three flavors that use userspace
threads, all presumably implemented by posix threads: posix, rt-preempt,
and xenomai-user. I dont know how things work in the rt-preempt and
xenomai-user flavors, hopefully their scheduling somehow matches our
invariant. If not, that would be bad...)
This is not a huge problem in practice, because sim configs (and by
extension, ubc's posix configs) generally only use one thread. So the
change in behavior should be masked by our current set of use cases.
However, for conceptual consistency I would like to see all kinds of HAL
threads meet the same invariants. Michael started work towards this
goal here, but it's not finished:
http://git.linuxcnc.org/gitweb?p=linuxcnc.git;a=commitdiff;h=30301356cab8bb17122de6a59bcc65a28b5981a5
So this email is an explanation of what i think the problem is, what i
think the fix is, and a request for Michael to finish the work.
--
Sebastian Kuzminsky
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