hello Don , In my opinion the only reason for separating IO ground from Digital ground is the ease of avoiding current through it. If a RF current flows through a conducting IO ground plane some voltage drop will occur. The voltage drop will actually give rise to CM radiation on the connected IO cables. (screen mesh and or ground connected wires).
Draw back in this type of design is that IO ground currents get mixed up in the part (small trace) of PCB that connects the IO area with digital ground. Possibility of cross talk. This is definitely not an EMC but certainly a functional problem. Full digital designs don't have this problem. For low level input 2 separate IO areas might be considered, if these are audio or LF, the 2 areas may be HF interconnected using one ore more small C's in parallel. Current loops are most often no EMC problem in digital designs, but can be in low impedance low level designs. Problems caused by ground loops are mostly functional and not emi-related. Ground connects to enclosure (if metallic) should be realized using metal stand-offs, evenly spaced every 3-5 cm 1.5 - 2 " preferably in the IO separated ground plane (which is RF current free ). If you can earth-to-enclosure only one IO ground plane (in the case of separation as above), connect the low level one, and use additional CM serial impedance for the I/O in the high level part (f.i. CM-coils) Do not hesitate to inquire if this very brief section is not clear to you. == CE-test, qualified testing, Consultancy, Compliance tests for EMC and Electrical Safety 15 Great EMC-design tips available ! Visit our site : http://www.cetest.nl The Dutch Electronics Directory http://www.cetest.nl/electronics.htm == -----Oorspronkelijk bericht----- Van: UMBDENSTOCK, DON [SMTP:umbdenst...@sensormatic.com] Verzonden: woensdag 18 maart 1998 15:06 Aan: 'EMC-PSTC Discussion Group' Onderwerp: Islands -- Vcc, Ground While reviewing the EMI mitigation techniques of our engineers, a few of us have been debating the use of ground islands on a multilayer board. The designs have one layer for Vcc, one for ground and 2 signal layers. The Vcc layer is isolated into various islands. The debate involves the segregation of grounds. The benefit of isolating digital from analog ground is understood. The question is whether I/O ground should be isolated from processor ground. Some schools of thought say keep the ground plane whole for lowest impedance, stitching it to the chassis ground through conductive stand-offs periodically. Some prescribe segregating I/O from processor ground, being careful where to place chassis connection points to prevent ground loops and ground reference corruption. I would be interested in hearing from the forum what your pet approach is and why you believe it works for your situation. Thanks in advance for your comments. Don Umbdenstock Sensormatic Electronics Corporation
